Electronic Design Automation

2.6. Low-Power Circuit Design Techniques

As mentioned earlier, there are three sources of power dissipation in CMOS circuits: dynamic power dissipation, short-circuit power dissipation, and static (leakage) power dissipation. Traditionally, dynamic power dissipation has been the dominant source of power dissipation. With continued scaling of CMOS technology, however, leakage power dissipation has become a significant source of power consumption as well. This subsection describes some commonly used circuit-level techniques for reducing power dissipation.

2.6.1. Clock-gating

One commonly used technique to reduce power dissipation is to use clock-gating. The idea is that clock lines to circuits that are not being used are ANDed with a gate-control ...