3.4.1. Test pattern generation
For logic BIST applications, in-circuit TPGs constructed from linear feedback shift registers (LFSRs) are most commonly used to generate test patterns or test sequences for exhaustive testing, pseudo-random testing, and pseudo-exhaustive testing.
Exhaustive testing always guarantees 100% single-stuck and multiple-stuck fault coverage. This technique requires all possible 2n test patterns to be applied to an n-input combinational CUT, which can take too long for combinational circuits where n is huge. Therefore, pseudo-random testing [Bardell 1987] is often used for generating a subset of the 2n test patterns and uses fault simulation to calculate the exact fault coverage. In some cases, this might become quite ...
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