R3.4 Logic Built-in Self-Test

[Bardell 1982] P. H. Bardell and W. H. McAnney, Self-testing of multiple logic modules, in Proc. IEEE Int. Test Conf., pp. 200–204, November 1982.

[Barzilai 1981] Z. Barzilai, J. Savir, G. Markowsky, M.G. Smith, The weighted syndrome sums approach to VLSI testing IEEE Trans. on Computers 30 12 December 1981, 996-1000

[Barzilai 1983] Z. Barzilai, D. Coppersmith, A. Rosenberg, Exhaustive bit pattern generation in discontiguous positions with applications to VLSI testing IEEE Trans. on Computers 32 2 February 1983, 190-194

[Benowitz 1975] N. Benowitz, D.F. Calhoun, G.E. Alderson, J.E. Bauer, C.T. Joeckel, An advanced fault isolation system for digital logic IEEE Trans. on Computers 24 5 May 1975, 489-497 ...

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