Embedded SoPC Design with Nios II Processor and Verilog Examples

CONTENTS

Preface

Acknowledgments

1 Overview of Embedded System

1.1 Introduction

1.1.1 Definition of an embedded system

1.1.2 Example systems

1.2 System design requirements

1.3 Embedded SoPC systems

1.3.1 Basic development flow

1.4 Book organization

1.5 Bibliographic notes

PART I BASIC DIGITAL CIRCUITS DEVELOPMENT

2 Gate-level Combinational Circuit

2.1 Introduction

2.2 General description

2.3 Basic lexical elements and data types

2.3.1 Lexical elements

2.4 Data types

2.4.1 Four-value system

2.4.2 Data type groups

2.4.3 Number representation

2.4.4 Operators

2.5 Program skeleton

2.5.1 Port declaration

2.5.2 Program body

2.5.3 Signal declaration

2.5.4 Another example

2.6 Structural description

2.7 Testbench

2.8 Bibliographic notes

2.9 Suggested experiments

2.9.1 Code for gate-level greater-than circuit

2.9.2 Code for gate-level binary decoder

3 Overview of FPGA and EDA Software

3.1 FPGA

3.1.1 Overview of a general FPGA device

3.1.2 Overview of the Altera Cyclone II devices

3.2 Overview of the Altera DE1 and DE2 boards

3.3 Development flow

3.4 Overview of Quartus II

3.5 Short tutorial of Quartus II

3.5.1 Create the design project

3.5.2 Create a testbench and perform the RTL simulation

3.5.3 Compile the project

3.5.4 Perform timing analysis

3.5.5 Program the FPGA device

3.6 Short tutorial on the ModelSim HDL simulator

3.7 Bibliographic notes

3.8 Suggested experiments

3.8.1 Gate-level greater-than circuit

3.8.2 Gate-level binary decoder

4 RT-level Combinational Circuit

4.1 Operators ...