Emerging Nanoelectronic Devices

13Emerging Memory Devices: Assessment and Benchmarking

Matthew J. Marinella¹ and Victor V. Zhirnov²

¹Sandia National Laboratories, USA

²Semiconductor Research Corporation, USA

13.1 Introduction

We are at an interesting juncture in memory technology. As of the time of this writing, production NAND flash has been scaled to a critical dimension of 16 nm [1] and 3D Vertical NAND has entered commercial production [2]. However, endurance and retention have become strongly degraded as flash tunnel oxides become thinner, leading to requirements for extensive error correction code (ECC) schemes and substantial redundant storage requirements. Storage Class Memory (SCM) has identified the significant latency gap between NAND-based solid-state disks (SSDs) and DRAM [3,4] (SCM concepts are covered in detail in Chapter 25). Hence, an emerging or prototypical memory technology may supplement, or even supplant NAND flash in the coming decade. Furthermore, continued DRAM scaling faces numerous challenges, and does not yet have known manufacturable solutions past the 20 nm node [5]. Impending limitations of standard memory technologies combined with massive increases in data quantities have even led to proposals of a radical shift toward datacentric-based architectures such as nanostores [6].

Prototypical memory technologies, in particular spin transfer torque RAM (STT-RAM) and phase change RAM (PCRAM), have made improvements in recent years and are being commercially produced for niche markets. ...