ESD

ESD

by Steven H. Voldman
Released November 2014
Publisher(s): Wiley
ISBN: 9781119965183

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Book description

A comprehensive and in-depth review of analog circuit layout, schematic architecture, device, power network and ESD design

This book will provide a balanced overview of analog circuit design layout, analog circuit schematic development, architecture of chips, and ESD design.  It will start at an introductory level and will bring the reader right up to the state-of-the-art. Two critical design aspects for analog and power integrated circuits are combined. The first design aspect covers analog circuit design techniques to achieve the desired circuit performance. The second and main aspect presents the additional challenges associated with the design of adequate and effective ESD protection elements and schemes. A comprehensive list of practical application examples is used to demonstrate the successful combination of both techniques and any potential design trade-offs. 

Chapter One looks at analog design discipline, including layout and analog matching and analog layout design practices. Chapter Two discusses  analog design with circuits, examining: single transistor amplifiers; multi-transistor amplifiers; active loads and more. The third chapter covers analog design layout (also MOSFET layout), before Chapters Four and Five discuss analog design synthesis. The next chapters introduce the reader to analog-digital mixed signal design synthesis, analog signal pin ESD networks, and analog ESD power clamps. Chapter Nine, the last chapter, covers ESD design in analog applications.

  • Clearly describes analog design fundamentals (circuit fundamentals) as well as outlining the various ESD implications
  • Covers a large breadth of subjects and technologies, such as CMOS, LDMOS, BCD, SOI, and thick body SOI
  • Establishes an “ESD analog design” discipline that distinguishes itself from the alternative ESD digital design focus
  • Focuses on circuit and circuit design applications
  • Assessible, with the artwork and tutorial style of the ESD book series
  • PowerPoint slides are available for university faculty members

Even in the world of digital circuits, analog and power circuits are two very important but under-addressed topics, especially from the ESD aspect.  Dr. Voldman’s new book will serve as an essential and practical guide to the greater IC community. With high practical and academic values this book is a “bible” for professionals, graduate students, device and circuit designers for investigating the physics of ESD and for product designs and testing. 

Table of contents

  1. Cover
  2. ESD Series
  3. Title page
  4. Copyright page
  5. Dedication
  6. About the Author
  7. Preface
  8. Acknowledgments
  9. 1 Analog, ESD, and EOS
    1. 1.1 ESD in Analog Design
    2. 1.2 Analog Design Discipline and ESD Circuit Techniques
    3. 1.3 Design Symmetry and ESD
    4. 1.4 ESD Design Synthesis and Architecture Flow
    5. 1.5 ESD Design and Noise
    6. 1.6 ESD Design Concepts: Adjacency
    7. 1.7 Electrical Overstress
    8. 1.8 Reliability Technology Scaling and the Reliability Bathtub Curve
    9. 1.9 Safe Operating Area
    10. 1.10 Closing Comments and Summary
    11. References
  10. 2 Analog Design Layout
    1. 2.1 Analog Design Layout Revisited
    2. 2.2 Common Centroid Design
    3. 2.3 Interdigitation Design
    4. 2.4 Common Centroid and Interdigitation Design
    5. 2.5 Passive Element Design
    6. 2.6 Resistor Element Design
    7. 2.7 Capacitor Element Design
    8. 2.8 Inductor Element Design
    9. 2.9 Diode Design
    10. 2.10 MOSFET Design
    11. 2.11 Bipolar Transistor Design
    12. 2.12 Closing Comments and Summary
    13. References
  11. 3 Analog Design Circuits
    1. 3.1 Analog Circuits
    2. 3.2 Single-Ended Receivers
    3. 3.3 Differential Receivers
    4. 3.4 Comparators
    5. 3.5 Current Sources
    6. 3.6 Current Mirrors
    7. 3.7 Voltage Regulators
    8. 3.8 Voltage Reference Circuits
    9. 3.9 Converters
    10. 3.10 Oscillators
    11. 3.11 Phase Lock Loop
    12. 3.12 Delay Locked Loop
    13. 3.13 Closing Comments and Summary
    14. References
  12. 4 Analog ESD Circuits
    1. 4.1 Analog ESD Devices and Circuits
    2. 4.2 ESD Diodes
    3. 4.3 ESD MOSFET Circuits
    4. 4.4 ESD Silicon-Controlled Rectifier Circuits
    5. 4.5 Laterally Diffused MOS Circuits
    6. 4.6 DeMOS Circuits
    7. 4.7 Ultrahigh-Voltage LDMOS Circuits
    8. 4.8 Closing Comments and Summary
    9. References
  13. 5 Analog and ESD Design Synthesis
    1. 5.1 Early ESD Failures in Analog Design
    2. 5.2 Mixed-Voltage Interface: Voltage Regulator Failures
    3. 5.3 Separation of Analog Power from Digital Power AVDD to DVDD
    4. 5.4 ESD Failure in Phase Lock Loop (PLL) and System Clock
    5. 5.5 ESD Failure in Current Mirrors
    6. 5.6 ESD Failure in Schmitt Trigger Receivers
    7. 5.7 Isolated Digital and Analog Domains
    8. 5.8 ESD Protection Solution: Connectivity of AVDD to VDD
    9. 5.9 Connectivity of AVSS to DVSS
    10. 5.10 Digital and Analog Domain with ESD Power Clamps
    11. 5.11 Digital and Analog Domain with Master/Slave ESD Power Clamps
    12. 5.12 High-Voltage, Digital, and Analog Domain Floor Plan
    13. 5.13 Closing Comments and Summary
    14. References
  14. 6 Analog-to-Digital ESD Design Synthesis
    1. 6.1 Digital and Analog
    2. 6.2 Interdomain Signal Line ESD Failures
    3. 6.3 Digital-to-Analog Core Spatial Isolation
    4. 6.4 Digital-to-Analog Core Ground Coupling
    5. 6.5 Domain-to-Domain Signal Line ESD Networks
    6. 6.6 Domain-to-Domain Third-Party Coupling Networks
    7. 6.7 Domain-to-Domain Cross-Domain ESD Power Clamp
    8. 6.8 Digital-to-Analog Domain Moat
    9. 6.9 Digital-to-Analog Domain Moat with Through-Silicon Via
    10. 6.10 Domain-to-Domain ESD Design Rule Check and Verification Methods
    11. 6.11 Closing Comments and Summary
    12. References
  15. 7 Analog-ESD Signal Pin Co-synthesis
    1. 7.1 Analog Signal Pin
    2. 7.2 Analog Signal Differential Receiver
    3. 7.3 Analog CMOS Differential Receiver
    4. 7.4 Analog Differential Pair ESD Signal Pin Matching with Common Well Layout
    5. 7.5 Analog Differential Pair Common Centroid Design Layout: Signal Pin-to-Signal Pin and Parasitic ESD Elements
    6. 7.6 Closing Comments and Summary
    7. References
  16. 8 Analog and ESD Circuit Integration
    1. 8.1 Analog and Power Technology and ESD Circuit Integration
    2. 8.2 ESD Input Circuits
    3. 8.3 Analog ESD Output Circuits
    4. 8.4 Analog ESD Ground-to-Ground Networks
    5. 8.5 ESD Power Clamps
    6. 8.6 ESD Power Clamps for Low-Voltage Digital and Analog Domain
    7. 8.7 ESD Power Clamp Issues
    8. 8.8 ESD Power Clamp Design
    9. 8.9 Bipolar ESD Power Clamps
    10. 8.10 Closing Comments and Summary
    11. References
  17. 9 System-Level EOS Issues for Analog Design
    1. 9.1 EOS Protection Devices
    2. 9.2 EOS Protection Device: Directionality
    3. 9.3 System-Level Pulse Model
    4. 9.4 EOS Transient Voltage Suppression (TVS)
    5. 9.5 EOS Current Suppression Devices
    6. 9.6 EOS and EMI Prevention: Printed Circuit Board Design
    7. 9.7 Closing Comments and Summary
    8. References
  18. 10 Latchup Issues for Analog Design
    1. 10.1 Latchup in Analog Applications
    2. 10.2 I/O-to-I/O Latchup
    3. 10.3 I/O-to-I/O Latchup: N-Well to N-Well
    4. 10.4 I/O-to-I/O Latchup: N-Well to NFET
    5. 10.5 I/O-to-I/O Latchup: NFET to NFET
    6. 10.6 I/O-to-I/O Latchup: N-Well Guard Ring between Adjacent Cells
    7. 10.7 Latchup of Analog I/O to Adjacent Structures
    8. 10.8 Analog I/O to Core
    9. 10.9 Core-to-Core Analog–Digital Floor Planning
    10. 10.10 High-Voltage Guard Rings
    11. 10.11 Through-Silicon Via (TSV)
    12. 10.12 Trench Guard Rings
    13. 10.13 Active Guard Rings
    14. 10.14 Closing Comments and Summary
    15. References
  19. 11 Analog ESD Library and Documents
    1. 11.1 Analog Design Library
    2. 11.2 Analog Device Library: PASSIVE ELEMENTS
    3. 11.3 Analog Device Library: Active Elements
    4. 11.4 Analog Design Library: Repository of Analog Circuits and Cores
    5. 11.5 ESD Device Library
    6. 11.6 Cadence-Based Parameterized Cells (PCells)
    7. 11.7 Analog ESD Documents
    8. 11.8 ESD Cookbook
    9. 11.9 Electrical Overstress (EOS) Documents
    10. 11.10 Closing Comments and Summary
    11. References
  20. 12 Analog ESD and Latchup Design Rule Checking and Verification
    1. 12.1 Electronic Design Automation
    2. 12.2 Electrical Overstress (EOS) and ESD Design Rule Checking
    3. 12.3 Electrical Overstress (EOS) Electronic Design Automation
    4. 12.4 Printed Circuit Board (PCB) Design Rule Checking and Verification
    5. 12.5 Electrical Overstress and Latchup Design Rule Checking (DRC)
    6. 12.6 Whole-Chip Checking and Verification Methods
    7. 12.7 Cross-Domain Signal Line Checking and Verification
    8. 12.8 Closing Comments and Summary
    9. References
  21. Appendix: Standards
    1. ESD Association
    2. JEDEC
    3. International Electro-technical Commission (IEC)
    4. IEEE
    5. Department of Defense (DOD)
    6. Military Standards
    7. SAE
  22. Appendix: Glossary of Terms
  23. Index
  24. End User License Agreement

Product information

  • Title: ESD
  • Author(s): Steven H. Voldman
  • Release date: November 2014
  • Publisher(s): Wiley
  • ISBN: 9781119965183