1Analog, ESD, and EOS

In 1993, I was invited to consult for two days with a well-known semiconductor analog corporation on electrostatic discharge (ESD) protection of analog components. A vice president of the corporation sat with me and said, “Our analog products are superior to any of our competitors. As a result, no one cared about the level of our ESD protection results! All of our products did not achieve 2000 V HBM or 4000 V HBM levels. Today, with growth of competition in the analog business sector, overnight, 75% of our customers want us to achieve better than 2000 V HBM levels on all of our products! How do I build a corporate ESD strategy for this analog corporation ?…”

This was my first introduction to the world of ESD in analog design.

1.1 ESD in Analog Design

In every technology sector, electrostatic discharge (ESD) protection was not an issue when there was a sole supplier of critical products and the customer was willing to accept the product. Eventually, as the technology or application space matured, customers wanted better ESD protection as both technology and application became mainstream or high volume. This was true historically in digital and analog applications with CMOS, bipolar, silicon on insulator (SOI), silicon germanium (SiGe), and gallium arsenide (GaAs) technologies. With mainstream introduction of a technology, it is desirable not to have customer field returns from ESD or electrical overstress (EOS).

As a result of the unique needs of analog ...

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