ESD

8Analog and ESD Circuit Integration

8.1 Analog and Power Technology and ESD Circuit Integration

In analog circuitry and power applications, a large number of electrostatic discharge (ESD) networks are needed due to the breadth of applications, application voltages, and technology requirements [1–11]. ESD networks must be suitable for the application voltages ranging from 1.5 V to ultrahigh-voltage (UHV) conditions of 600–800 V. In this chapter, the discussion will go into greater depth on the needs of an analog and power technology, with some focus on the issues for analog power ESD networks.

8.1.1 Analog ESD: Isolated and Nonisolated Designs

In analog circuitry, the ability to isolate the network from the substrate is necessary for voltage isolation, noise, or latchup [11]. In LDMOS and bipolar-CMOS-DMOS (BCD) technology, transistor elements can be placed in the substrate or in an isolation well structure. ESD protection networks can be constructed with both isolated and nonisolated designs. For ESD designs that are isolated, the isolation voltage is the maximum voltage that the element can be used for a given power supply application voltage.

8.1.2 Integrated Body Ties

In high-voltage (HV) applications from 5 to 120 V, an important issue is whether a device has a “body tie” electrically connecting a source to the LDMOS body [11]. In some ESD networks, it may be required to not connect the transistor body to the source but have the ability to isolate them. In networks that ...