Chapter 5. Simulation

5.1. Introduction

This chapter discusses the simulation phase of the FPGA development process. In my opinion, it is the most exciting and fun part of the FPGA development phases. At this point, you have a design that needs to be verified. The design could be one created in this book, one you or someone else created, a netlist created as a result from the synthesis or implementation phases (discussed later in this book), or some modifications to an existing design. Regardless of the type of design, the purpose of simulation is to verify that the design performs the required functions. Typically, simulation can be performed in three places in the development process: on the output from design, synthesis, and implementation ...

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