3.3. SOC Verification
All the verification methods we covered in Chapter 2 for ASICs apply to SOCs as well. However, SOC verification becomes more complex because of the many different kinds of IPs on the chip. A verification plan must cover the verification of the individual cores as well as that of the overall SOC. A good understanding of the overall application of the SOC is essential. The more extensive and intense the knowledge of the external interfaces and their interactions with the SOC, the more complete the SOC verification will be. Various SOC applications require unique external interface constraints, and the verification team should consider those constraints early on.
The SOC functionality can be represented with data-flow and control-flow ...
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