Fundamentals of Power Integrity for Computer Platforms and Systems

Appendix A

Table of Inductances for Commonly Used Geometries

Inductance computations are the more commonly extracted elements that power integrity engineers use for analytical estimations. In addition to those simple computations shown in Chapter 3, a few more formulas have been added here. There are a number of good references for these closed-form expressions—and many others. Ruehli [1] has described a method to extract partial inductances, which allows one to breakdown the total loop inductance of a circuit with partial elements. His method is well worth reviewing because very reasonable approximations may be made for even complex geometries using the well-termed PEEC (partial element equivalent circuit) modeling method. Hoer and Love [2] have conveniently given a number of rectangular geometry-based inductances, which are elegant and yield good results for estimation in many problems. Leferink [3–5] also describes a number of planar structures, which are useful references. All of these formulae may be found in Ref. [3]. These formulae represent the self-inductances of a few structures only. In most cases, the mutual inductance may be ignored for many power geometries. A simple mutual inductance formula for two parallel wires has also been added later for reference. Three excellent additional references are found in [6–8]. Table A.1 summarizes a few of these formulae. Some basic notes follow it

Table A.1 Inductance closed-form expressions

Number

Structure

Equation for ...