3Power Delivery Network and Integrity in 3D‐IC Chips

Makoto Nagata

Kobe University, Graduate School of Science, Technology and Innovation, 1‐1 Rokkodai, Nada, Kobe, 657‐8501, Japan

3.1 Introduction

Power delivery network (PDN) determines the capability of powering circuits in a very large‐scale integration (VLSI) chip. It also characterizes power noise emission, interference, and susceptibility of an entire electronic system that uses the VLSI chip. The design and verification of PDNs need not only to include circuits on chips but also to consider their interaction with packages and printed circuit boards (PCBs) that are associated with assembly as a complete system. The analysis and diagnosis frameworks should combine the static impedance characteristics ...

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