18Thermal Modeling and Model Validation for 3D Stacked ICs

Herman Oprins Federica Maggioni Vladimir Cherman Geert Van der Plas and Eric Beyne

IMEC, Kapeldreef 75, 3001, Leuven, Belgium

18.1 Introduction

Thermal issues are more pronounced in 3D integrated systems compared with conventional 2D systems, due to the nature of the vertical stacking of the chips, the use of adhesives with low thermal conductivity, and the reduced lateral thermal spreading due to aggressive thinning of the dies down to a few tens of micrometers. Therefore, a dedicated thermal analysis (modeling, experimental, or a combination of both) of the 3D system is required to mitigate hotspots and to ensure the operating temperatures are kept below the maximum allowed temperature ...

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