Chapter 18. Applications

Chuck Yuan, Dan Oh, and Ravi Kollipara

Throughout this book, the various aspects of modeling and analyzing I/O interface channels are examined. However, the complete analysis of a particular signaling scheme has not been discussed. In this chapter, several signaling schemes are analyzed to illustrate the concepts described in previous chapters with specific examples. In the final section, we speculate about what signaling will look like in the future, and the challenges that it will present.

Rambus’ XDR memory channel is the first example. It demonstrates several key innovations that mitigate signal integrity issues in high-speed memory operations. These innovations include the FlexPhase timing adjustment (which solves ...

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