8.2. Memory Organization
The way in which both virtual and physical memory is organized can affect the overall performance of the system. Some of the hardware organizations of memory were discussed in Section 6.5, “Main Memory Performance Issues” on page 142. This section discusses how HP-UX organizes the virtual memory into different page sizes to make better use of the processor's TLBs and how it chooses to allocate memory on cell-based machines to improve the memory latency and overall system throughput.
8.2.1. Variable Page Sizes
PA-RISC 2.0 and IPF-based systems typically have smaller TLBs than early PA-RISC systems that had very large off-chip TLBs. The small TLBs are a necessity for newer processors, since the CPU chip is a very expensive ...