Book description
HyperTransport™ (HT) technology promises to revolutionize connectivity for computers, servers, embedded systems, and networking and tele-communications equipment. It is a high-speed, low latency, point-to-point, packetized link that enables chips to transfer data at peak rates of up to 12.8 Gigabytes per second, far greater than existing bus technologies. Furthermore, HyperTransport improves reliability and reduces board design complexity. It is scalable and compatible with legacy PC buses, SNA, and PCI.
HyperTransport™ System Architecture provides a comprehensive, technical guide to HyperTransport technology. It opens with an overview of HT systems, highlighting the technology's fundamental principles, basic architecture, and its many advantages. The book goes on to detail all facets of HyperTransport systems, including the protocol, I/O, routing, configuration, and more. It also features important performance considerations and addresses critical compatibility issues.
Essential topics covered include:
Signal groups
Packet protocol, covering control and data packets
HT flow control, and how it differs from PCI flow control
I/O ordering rules, including upstream, downstream, and host ordering requirements
Interrupts, error detection, and error handling
HT system management
Routing packets, covering point-to-point topology and HT's fairness algorithm
Device configuration
The electrical environment, including power requirements and signaling characteristics
HyperTransport bridges
Double-hosted chains
Anticipated networking extensions
PCI, PCI-X, AGP, and X86 compatibility issues
A chapter is dedicated to transaction examples illustrating the practical application of HyperTransport technology.
A MindShare PC System Architecture Series book, HyperTransport™ System Architecture provides complete, authoritative, and detailed information necessary for developers, networking professionals, and anyone interested in implementing and deploying HT systems.
MindShare's PC System Architecture Series is a crisply written and comprehensive set of guides to the most important PC hardware standards. Books in the series are intended for use by hardware and software designers, programmers, and support personnel. Each title explains the architecture, features, and operations of systems built using one particular type of chip or hardware specification.
0321168453B02032003
Table of contents
- Copyright
- PC System Architecture Series
- Figures
- Tables
- Acknowledgments
- About This Book
- Overview of HyperTransport
-
HyperTransport Core Topics
- Signal Groups
- Packet Protocol
- Flow Control
- I/O Ordering
-
Transaction Examples
- Packets As Transaction Building Blocks
- Transaction Examples: Introduction
- Example 1: NOP Information Packet
- Generic Request And Response Packet Formats
- Example 2: Non-Posted WrSized (Dword) Transaction
- Example 3: Posted Byte Write Request
- Example 4:Dword Read Request
- Example 5:Byte Read Request
- Example 6:Flush Request
- Example 7:Fence Request
- Example 8:Atomic Read-Modify-Write
- Example 9: WrSized Request Crosses A Bridge
- HT Interrupts
- System Management
- Error Detection And Handling
- Routing Packets
- Reset & Initialization
- Device Configuration
- Electrical
- Clocking
- HyperTransport Optional Topics
- HyperTransport Legacy Support
- Glossary of Terms
- Index
Product information
- Title: HyperTransport™ System Architecture
- Author(s):
- Release date: February 2003
- Publisher(s): Addison-Wesley Professional
- ISBN: 0321168453
You might also like
book
Embedded Systems Architecture
A comprehensive guide to reaping the benefits of architectural modeling in embedded design About This Book …
book
Operating Systems: Concurrent and Distributed Software Design
Modern software systems rely on the concepts of concurrency, modularity and distribution, both within the design …
book
Low-Level Programming: C, Assembly, and Program Execution on Intel® 64 Architecture
Learn Intel 64 assembly language and architecture, become proficient in C, and understand how the programs …
book
The Book of I2C
If you work with embedded systems, youâ??re bound to encounter the ubiquitous Inter-Integrated Circuit bus (IIC, …