September 2002
Intermediate to advanced
332 pages
11h 1m
English
Content preview from IBM eServer zSeries 900 Technical Guide
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22 IBM eServer zSeries 900 Technical Guide
There are 6 PUs per cluster.
Each SCE has 2 SD chips, resulting in an 8 MB L2 cache per cluster.
There are 2 memory buses.
There are 2 memory cards, resulting in up to 32 GB of memory.
All z900 12-PU server models use the CMOS 8S PU chips running at 1.3 ns.
A complete z900 12-PU system has 12 PUs, 16 MB L2 Cache, 4 MBAs, 2 Memory cards
allowing up to 32 GB, 2 CEs, 2 ETRs, and up to 24 1-GB/s STIs.
2.2.3 Processing units
One of the most important components of the z900 server is the Processing Unit (PU). This is
where instructions are executed and their related data reside. The instructions and the data
are stored in the PU’s high-speed buffer, called cache Level 1 (L1). As shown later on this
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