IBM eX5 Implementation Guide

68 IBM eX5 Implementation Guide

The QPI Wrap Cards are not included with standard server models and must be ordered

separately. See Table 3-5.

Table 3-5 Ordering information for the QPI Wrap Card

The QPI Wrap Cards are installed in the QPI bays at the back of the server, as shown in

Figure 3-10.

QPI Wrap Cards are not needed in a 2-node configuration and not needed in a MAX5

configuration. When the QPI Wrap Cards are installed, no external QPI ports are available.

If you later want to attach a MAX5 expansion unit or connect a second node, you must first

remove the QPI Wrap Cards.

Figure 3-10 Rear of the x3850 X5

3.5 MAX5

As introduced in 3.1.3, “IBM MAX5 memory expansion unit” on page 59, the MAX5 memory

expansion drawer is available for both the x3850 X5 and the x3950 X5. Models of the x3850

X5 and x3950 X5 are available that include the MAX5, as described in 3.3, “Models” on

Part number Feature code Description

49Y4379 Not applicable IBM x3850 X5 and x3950 X5 QPI Wrap Card Kit (quantity 2)

Tips:

򐂰 Part number 49Y4379 includes two QPI Wrap Cards. You order only one of these parts

per server.

򐂰 QPI Wrap Cards cannot be ordered individually.

QPI bays (remove

the blanks first)

Chapter 3. IBM System x3850 X5 and x3950 X5 69

page 64, Also, you can order the MAX5 separately, as listed in Table 3-6. When ordering a

MAX5, remember to order the cable kit as well. For power supply fault redundancy, order the

optional power supply.

Table 3-6 Ordering information for the IBM MAX5 for System x

The eX5 chip set in the MAX5 is an IBM unique design that attaches to the QPI links as a

node controller, giving it direct access to all CPU bus transactions. It increases the number of

DIMMs supported in a system by a total of 32, and it also adds another 16 channels of

memory bandwidth, boosting overall throughput. Therefore, the MAX5 adds additional

memory and performance.

The eX5 chip connects directly through QPI links to all of the CPUs in the x3850 X5, and it

maintains a directory of each

CPU’s last-level cache. Therefore, when a CPU requests

content stored in the cache of another CPU, the MAX5 not only has that same data stored in

its own cache, it is able to return the acknowledgement of the snoop

and the data to the

requesting CPU in the same transaction. For more information about QPI links and snooping,

see 2.2.4, “QuickPath Interconnect (QPI)” on page 18.

The MAX5 also has EXA scalability ports used in an EXA-scaled configuration (that is, a

2-node and MAX5 configuration). These ports are reserved for future use.

In summary, the MAX5 offers the following major features:

򐂰 Adds 32 DIMM slots to either the x3850 X5 or the x3690 X5

򐂰 Adds 16 channels of memory bandwidth

򐂰 Improves snoop latencies

Figure 3-11 shows a diagram of the MAX5.

Figure 3-11 MAX5 block diagram

Part number Feature code Description

59Y6265 4199 IBM MAX5 for System x

60Y0332 4782 IBM 675W HE Redundant Power Supply

59Y6267 4192 IBM MAX5 to x3850 X5 Cable Kit

SMI

links

DDR3 DIMMs

(Two DIMMs per channel)

Memory

buffer

Memory

buffer

Memory

buffer

Memory

buffer

SMI

links

Memory

buffer

Memory

buffer

Memory

buffer

Memory

buffer

DDR3 DIMMs

(Two DIMMs per channel)

External connectors

QPI QPIQPI QPI EXA EXA EXA

IBM EXA

chip

QPI QPI