Book description
Digital business has been driving the transformation of underlying IT infrastructure to be more efficient, secure, adaptive, and integrated. Information Technology (IT) must be able to handle the explosive growth of mobile clients and employees. IT also must be able to use enormous amounts of data to provide deep and real-time insights to help achieve the greatest business impact.
This IBM® Redbooks® publication addresses the new IBM Mainframe, the IBM z13. The IBM z13 is the trusted enterprise platform for integrating data, transactions, and insight. A data-centric infrastructure must always be available with a 99.999% or better availability, have flawless data integrity, and be secured from misuse. It needs to be an integrated infrastructure that can support new applications. It needs to have integrated capabilities that can provide new mobile capabilities with real-time analytics delivered by a secure cloud infrastructure.
IBM z13 is designed with improved scalability, performance, security, resiliency, availability, and virtualization. The superscalar design allows the z13 to deliver a record level of capacity over the prior z Systems. In its maximum configuration, z13 is powered by up to 141 client characterizable microprocessors (cores) running at 5 GHz. This configuration can run more than 110,000 millions of instructions per second (MIPS) and up to 10 TB of client memory. The IBM z13 Model NE1 is estimated to provide up to 40% more total system capacity than the IBM zEnterprise® EC12 (zEC1) Model HA1.
This book provides information about the IBM z13 and its functions, features, and associated software support. Greater detail is offered in areas relevant to technical planning. It is intended for systems engineers, consultants, planners, and anyone who wants to understand the IBM z Systems functions and plan for their usage. It is not intended as an introduction to mainframes. Readers are expected to be generally familiar with existing IBM z Systems technology and terminology.
Table of contents
- Front cover
- Notices
- IBM Redbooks promotions
- Preface
- Chapter 1. Introducing the IBM z13
- Chapter 2. Central processor complex (CPC) hardware components
-
Chapter 3. Central processor complex system design
- 3.1 Overview
- 3.2 Design highlights
- 3.3 CPC drawer design
-
3.4 Processor unit design
- 3.4.1 Simultaneous multithreading (SMT)
- 3.4.2 Single-instruction multiple-data (SIMD)
- 3.4.3 Out-of-order (OOO) execution
- 3.4.4 Superscalar processor
- 3.4.5 Compression and cryptography accelerators on a chip
- 3.4.6 Decimal floating point (DFP) accelerator
- 3.4.7 IEEE floating point
- 3.4.8 Processor error detection and recovery
- 3.4.9 Branch prediction
- 3.4.10 Wild branch
- 3.4.11 Translation lookaside buffer (TLB)
- 3.4.12 Instruction fetching, decoding, and grouping
- 3.4.13 Extended Translation Facility
- 3.4.14 Instruction set extensions
- 3.4.15 Transactional Execution
- 3.4.16 Runtime Instrumentation
-
3.5 Processor unit (PU) functions
- 3.5.1 Overview
- 3.5.2 Central processors (CPs)
- 3.5.3 Integrated Facility for Linux (IFL)
- 3.5.4 Internal Coupling Facility (ICF)
- 3.5.5 z Systems Integrated Information Processor (zIIP)
- 3.5.6 System assist processors
- 3.5.7 Reserved processors
- 3.5.8 Integrated firmware processor (IFP)
- 3.5.9 Processor unit assignment
- 3.5.10 Sparing rules
- 3.5.11 Increased flexibility with z/VM mode partitions
- 3.6 Memory design
- 3.7 Logical partitioning
- 3.8 Intelligent Resource Director (IRD)
- 3.9 Clustering technology
-
Chapter 4. Central processor complex I/O system structure
- 4.1 Introduction to the InfiniBand and PCIe for I/O infrastructure
- 4.2 I/O system overview
- 4.3 I/O drawer
- 4.4 PCIe I/O drawer
- 4.5 PCIe I/O drawer and I/O drawer offerings
- 4.6 Fanouts
- 4.7 I/O features (cards)
- 4.8 Connectivity
- 4.9 Parallel Sysplex connectivity
- 4.10 Cryptographic functions
- 4.11 Integrated firmware processor
- 4.12 Flash Express
- 4.13 10GbE RoCE Express
- 4.14 zEDC Express
-
Chapter 5. Central processor complex channel subsystem
-
5.1 Channel subsystem
- 5.1.1 Multiple channel subsystems concept
- 5.1.2 CSS elements
- 5.1.3 Multiple subchannel sets
- 5.1.4 Parallel access volumes and extended address volumes
- 5.1.5 Logical partition name and identification
- 5.1.6 Physical channel ID (PCHID)
- 5.1.7 Channel spanning
- 5.1.8 Multiple CSSs construct
- 5.1.9 Adapter ID (AID)
- 5.1.10 Channel subsystem enhancement for I/O resilience
- 5.2 I/O configuration management
- 5.3 Channel subsystem summary
- 5.4 System-initiated CHPID reconfiguration
- 5.5 Multipath initial program load
-
5.1 Channel subsystem
-
Chapter 6. Cryptography
- 6.1 Cryptographic synchronous functions
- 6.2 Cryptographic asynchronous functions
- 6.3 CPACF protected key
- 6.4 PKCS #11 overview
- 6.5 Cryptographic feature codes
- 6.6 CP Assist for Cryptographic Function (CPACF)
- 6.7 Crypto Express5S
- 6.8 Tasks that are run by PCIe Crypto Express5S
-
6.9 TKE workstation feature
- 6.9.1 TKE workstation with Licensed Internal Code 7.0
- 6.9.2 TKE workstation with Licensed Internal Code 7.1
- 6.9.3 TKE workstation with Licensed Internal Code 7.2
- 6.9.4 TKE workstation with Licensed Internal Code 7.3
- 6.9.5 TKE workstation with Licensed Internal Code 8.0
- 6.9.6 Logical partition, TKE host, and TKE target
- 6.9.7 Optional smart card reader
- 6.9.8 TKE hardware support and migration information
- 6.10 Cryptographic functions comparison
- 6.11 Software support
-
Chapter 7. Software support
- 7.1 Operating systems summary
- 7.2 Support by operating system
-
7.3 Support by function
- 7.3.1 Single system image
- 7.3.2 zIIP support
- 7.3.3 Transactional Execution
- 7.3.4 Maximum main storage size
- 7.3.5 Flash Express
- 7.3.6 zEnterprise Data Compression Express (zEDC)
- 7.3.7 10GbE RoCE Express
- 7.3.8 Large page support
- 7.3.9 Hardware decimal floating point
- 7.3.10 Up to 85 LPARs
- 7.3.11 Separate LPAR management of PUs
- 7.3.12 Dynamic LPAR memory upgrade
- 7.3.13 LPAR physical capacity limit enforcement
- 7.3.14 Capacity Provisioning Manager
- 7.3.15 Dynamic PU add
- 7.3.16 HiperDispatch
- 7.3.17 The 63.75-K subchannels
- 7.3.18 Multiple subchannel sets (MSS)
- 7.3.19 Fourth subchannel set
- 7.3.20 IPL from an alternative subchannel set
- 7.3.21 Modified Indirect Data Address Word (MIDAW) facility
- 7.3.22 HiperSockets Completion Queue
- 7.3.23 HiperSockets integration with the intraensemble data network
- 7.3.24 HiperSockets Virtual Switch Bridge
- 7.3.25 HiperSockets Multiple Write Facility
- 7.3.26 HiperSockets IPv6
- 7.3.27 HiperSockets Layer 2 support
- 7.3.28 HiperSockets network traffic analyzer for Linux on z Systems
- 7.3.29 FICON Express16S
- 7.3.30 FICON Express8S
- 7.3.31 FICON Express8
- 7.3.32 z/OS Discovery and Auto-Configuration (zDAC)
- 7.3.33 High-performance FICON
- 7.3.34 Request node identification data
- 7.3.35 32 K subchannels for the FICON Express16S
- 7.3.36 Extended distance FICON
- 7.3.37 Platform and name server registration in FICON channel
- 7.3.38 FICON link incident reporting
- 7.3.39 FCP provides increased performance
- 7.3.40 N Port ID Virtualization (NPIV)
- 7.3.41 OSA-Express5S 10-Gigabit Ethernet LR and SR
- 7.3.42 OSA-Express5S Gigabit Ethernet LX and SX
- 7.3.43 OSA-Express5S 1000BASE-T Ethernet
- 7.3.44 OSA-Express4S 10-Gigabit Ethernet LR and SR
- 7.3.45 OSA-Express4S Gigabit Ethernet LX and SX
- 7.3.46 OSA-Express4S 1000BASE-T Ethernet
- 7.3.47 Open Systems Adapter for IBM zAware
- 7.3.48 Open Systems Adapter for Ensemble
- 7.3.49 Intranode management network (INMN)
- 7.3.50 Intraensemble data network
- 7.3.51 OSA-Express5S and OSA-Express4S NCP support
- 7.3.52 Integrated Console Controller
- 7.3.53 VLAN management enhancements
- 7.3.54 GARP VLAN Registration Protocol
- 7.3.55 Inbound workload queuing for OSA-Express5S and OSA-Express4S
- 7.3.56 Inbound workload queuing for Enterprise Extender
- 7.3.57 Querying and displaying an OSA configuration
- 7.3.58 Link aggregation support for z/VM
- 7.3.59 Multi-VSwitch Link Aggregation
- 7.3.60 QDIO data connection isolation for z/VM
- 7.3.61 QDIO interface isolation for z/OS
- 7.3.62 QDIO optimized latency mode
- 7.3.63 Large send for IPv6 packets
- 7.3.64 OSA-Express5S and OSA-Express4S checksum offload
- 7.3.65 Checksum offload for IPv4and IPv6 packets when in QDIO mode
- 7.3.66 Adapter interruptions for QDIO
- 7.3.67 OSA Dynamic LAN idle
- 7.3.68 OSA Layer 3 virtual MAC for z/OS environments
- 7.3.69 QDIO Diagnostic Synchronization
- 7.3.70 Network Traffic Analyzer
- 7.3.71 Program-directed re-IPL
- 7.3.72 Coupling over InfiniBand and Integrated Coupling Adapter
- 7.3.73 Dynamic I/O support for InfiniBand and ICA CHPIDs
- 7.3.74 Simultaneous multithreading (SMT)
- 7.3.75 Single Instruction Multiple Data (SIMD)
- 7.4 Cryptographic support
- 7.5 GDPS Virtual Appliance
- 7.6 z/OS migration considerations
- 7.7 IBM z Advanced Workload Analysis Reporter (zAware)
- 7.8 Coupling facility and CFCC considerations
- 7.9 Simultaneous multithreading (SMT)
- 7.10 Single-instruction multiple-data (SIMD)
- 7.11 The MIDAW facility
- 7.12 IOCP
- 7.13 Worldwide port name (WWPN) tool
- 7.14 ICKDSF
- 7.15 IBM z BladeCenter Extension (zBX) Model 004 software support
- 7.16 Software licensing
- 7.17 References
-
Chapter 8. System upgrades
- 8.1 Upgrade types
- 8.2 Concurrent upgrades
- 8.3 Miscellaneous equipment specification (MES) upgrades
- 8.4 Permanent upgrade through the CIU facility
- 8.5 On/Off Capacity on Demand
- 8.6 Capacity for Planned Event (CPE)
- 8.7 Capacity Backup (CBU)
- 8.8 Nondisruptive upgrades
- 8.9 Summary of Capacity on Demand offerings
-
Chapter 9. Reliability, availability, and serviceability
- 9.1 The RAS strategy
- 9.2 Technology change
- 9.3 Structure change
- 9.4 Reducing complexity
- 9.5 Reducing touches
- 9.6 z13 availability characteristics
- 9.7 z13 RAS functions
- 9.8 z13 enhanced drawer availability (EDA)
- 9.9 z13 Enhanced Driver Maintenance (EDM)
- 9.10 RAS capability for the HMC and SE
- 9.11 RAS capability for zBX Mod 004
- 9.12 Considerations for PowerHA in zBX environment
- 9.13 IBM z Advanced Workload Analysis Reporter
- 9.14 RAS capability for Flash Express
- Chapter 10. Environmental requirements
-
Chapter 11. Hardware Management Console and Support Elements
- 11.1 Introduction to the HMC and SE
- 11.2 HMC and SE enhancements and changes
- 11.3 HMC and SE connectivity
- 11.4 Remote Support Facility (RSF)
-
11.5 HMC and SE key capabilities
- 11.5.1 Central processor complex (CPC) management
- 11.5.2 Logical partition management
- 11.5.3 Operating system communication
- 11.5.4 HMC and SE microcode
- 11.5.5 Monitoring
- 11.5.6 Capacity on demand (CoD) support
- 11.5.7 Features on Demand (FoD) support
- 11.5.8 Server Time Protocol (STP) support
- 11.5.9 NTP client and server support on the HMC
- 11.5.10 Security and user ID management
- 11.5.11 System Input/Output Configuration Analyzer on the SE and HMC
- 11.5.12 Automated operations
- 11.5.13 Cryptographic support
- 11.5.14 Installation support for z/VM using the HMC
- 11.6 HMC in an ensemble
- Chapter 12. Performance
- Appendix A. IBM z Advanced Workload Analysis Reporter (IBM zAware)
- Appendix B. Channel options
- Appendix C. Flash Express
- Appendix D. GDPS Virtual Appliance
- Appendix E. RDMA over Converged Ethernet (RoCE) improvements
- Appendix F. IBM zEnterprise Data Compression Express
- Appendix G. Native Peripheral Component Interconnect Express (PCIe)
- Related publications
- Back cover
-
IBM System x Reference Architecture for Hadoop: IBM InfoSphere BigInsights Reference Architecture
- Introduction
- Business problem and business value
- Reference architecture use
- Requirements
- InfoSphere BigInsights predefined configuration
- InfoSphere BigInsights HBase predefined configuration
- Deployment considerations
- Customizing the predefined configurations
- Predefined configuration bill of materials
- References
- The team who wrote this paper
- Now you can become a published author, too!
- Stay connected to IBM Redbooks
- Notices
Product information
- Title: IBM z13 Technical Guide
- Author(s):
- Release date: April 2015
- Publisher(s): IBM Redbooks
- ISBN: 9780738440545
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