IBM z14 ZR1 Technical Guide

IBM z14 ZR1 Technical Guide

by Octavian Lascu
Released
Publisher(s): IBM Redbooks
ISBN: None

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Book description

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Table of contents

  1. Front cover
  2. Notices
    1. Trademarks
  3. Preface
    1. Authors
    2. Now you can become a published author, too!
    3. Comments welcome
    4. Stay connected to IBM Redbooks
  4. Chapter 1. Introducing the new IBM Z family member: IBM z14 Model ZR1
    1. 1.1 A digital transformation pillar
    2. 1.2 z14 ZR1 highlights
      1. 1.2.1 Models and upgrade paths
      2. 1.2.2 Rack and cabling
      3. 1.2.3 CPC drawer
      4. 1.2.4 PCIe+ I/O drawer
      5. 1.2.5 I/O subsystem and I/O features
    3. 1.3 z14 ZR1 capacity and performance
    4. 1.4 z14 ZR1 virtualization
      1. 1.4.1 PR/SM mode
      2. 1.4.2 Dynamic Partition Manager mode
      3. 1.4.3 LPAR types on z14 ZR1
      4. 1.4.4 Coupling facility
      5. 1.4.5 z/VM-mode
      6. 1.4.6 IBM Secure Service Container
      7. 1.4.7 GDPS Virtual Appliance
    5. 1.5 z14 ZR1 RAS
    6. 1.6 Hardware Management Consoles and Support Elements
    7. 1.7 Supported operating systems and compilers
      1. 1.7.1 Operating systems summary
      2. 1.7.2 IBM Z compilers
  5. Chapter 2. Central processor complex hardware components
    1. 2.1 System overview: Frame and drawers
      1. 2.1.1 z14 ZR1 configurations
      2. 2.1.2 PCIe+ I/O drawer
    2. 2.2 16U Reserved feature (FC 0617)
    3. 2.3 CPC drawer
      1. 2.3.1 Oscillator cards
      2. 2.3.2 System control
      3. 2.3.3 CPC drawer power
    4. 2.4 Single chip modules
      1. 2.4.1 Processor Unit Single Chip Module
      2. 2.4.2 Processor Unit (Core)
      3. 2.4.3 PU characterization
      4. 2.4.4 System Controller SCM (chip)
    5. 2.5 Memory
      1. 2.5.1 Memory subsystem topology
      2. 2.5.2 Redundant array of independent memory
      3. 2.5.3 Memory configurations
      4. 2.5.4 Memory upgrades
      5. 2.5.5 Virtual Flash Memory
      6. 2.5.6 Preplanned memory
    6. 2.6 Reliability, availability, and serviceability
      1. 2.6.1 RAS in the CPC memory subsystem
      2. 2.6.2 General z14 ZR1 RAS features
    7. 2.7 Connectivity
      1. 2.7.1 Redundant I/O interconnect
      2. 2.7.2 CPC drawer upgrades
      3. 2.7.3 System upgrades
      4. 2.7.4 Concurrent PU conversions
      5. 2.7.5 Model capacity identifier
      6. 2.7.6 Capacity Backup Upgrade
      7. 2.7.7 On/Off Capacity on Demand and CPs
    8. 2.8 Power and cooling
      1. 2.8.1 Considerations
      2. 2.8.2 Power and weight estimation tool
      3. 2.8.3 Cooling requirements
    9. 2.9 Summary
  6. Chapter 3. Central processor complex system design
    1. 3.1 Overview
    2. 3.2 Design highlights
    3. 3.3 CPC drawer design
      1. 3.3.1 Cache levels and memory structure
      2. 3.3.2 CPC drawer topology
    4. 3.4 Processor unit design
      1. 3.4.1 Simultaneous multithreading
      2. 3.4.2 Single-instruction multiple-data (enhanced for z14 ZR1)
      3. 3.4.3 Out-of-Order execution
      4. 3.4.4 Superscalar processor
      5. 3.4.5 Compression and cryptography accelerators on a chip
      6. 3.4.6 Decimal floating point accelerator
      7. 3.4.7 IEEE floating point
      8. 3.4.8 Processor error detection and recovery
      9. 3.4.9 Branch prediction
      10. 3.4.10 Wild branch
      11. 3.4.11 Translation lookaside buffer
      12. 3.4.12 Instruction fetching, decoding, and grouping
      13. 3.4.13 Extended Translation Facility
      14. 3.4.14 Instruction set extensions
      15. 3.4.15 Transactional Execution
      16. 3.4.16 Runtime Instrumentation
    5. 3.5 Processor unit functions
      1. 3.5.1 Overview
      2. 3.5.2 Central processors
      3. 3.5.3 Integrated Facility for Linux
      4. 3.5.4 Internal Coupling Facility
      5. 3.5.5 IBM Z Integrated Information Processor
      6. 3.5.6 System assist processors
      7. 3.5.7 Reserved processors
      8. 3.5.8 Integrated firmware processor
      9. 3.5.9 Sparing rules
    6. 3.6 Memory design
      1. 3.6.1 Overview
      2. 3.6.2 Main storage
      3. 3.6.3 Hardware system area
      4. 3.6.4 Virtual Flash Memory
    7. 3.7 Logical partitioning
      1. 3.7.1 Overview
      2. 3.7.2 Storage operations
      3. 3.7.3 Reserved storage
      4. 3.7.4 Logical partition storage granularity
      5. 3.7.5 LPAR dynamic storage reconfiguration
    8. 3.8 Intelligent Resource Director
    9. 3.9 Clustering technology
      1. 3.9.1 Coupling Facility Control Code
      2. 3.9.2 Coupling Thin Interrupts
      3. 3.9.3 Dynamic CF dispatching
    10. 3.10 Virtual Flash Memory
      1. 3.10.1 IBM Z Virtual Flash Memory overview
      2. 3.10.2 VFM feature
      3. 3.10.3 VFM administration
  7. Chapter 4. Central processor complex I/O system structure
    1. 4.1 Introduction to I/O infrastructure
      1. 4.1.1 I/O infrastructure
      2. 4.1.2 PCIe Generation 3
    2. 4.2 I/O system overview
      1. 4.2.1 Characteristics
      2. 4.2.2 Supported I/O features
    3. 4.3 PCIe+ I/O drawer
      1. 4.3.1 PCIe+ I/O drawer offerings
    4. 4.4 CPC drawer fanouts
      1. 4.4.1 PCIe Generation 3 fanout (FC 0173)
      2. 4.4.2 Integrated Coupling Adapter (FC 0172)
      3. 4.4.3 Fanout considerations
    5. 4.5 I/O features (cards)
      1. 4.5.1 I/O feature card ordering information
      2. 4.5.2 Physical channel ID report
    6. 4.6 Connectivity
      1. 4.6.1 I/O feature support and configuration rules
      2. 4.6.2 Storage connectivity
      3. 4.6.3 Network connectivity
      4. 4.6.4 Parallel Sysplex connectivity
    7. 4.7 Cryptographic functions
      1. 4.7.1 CPACF functions (FC 3863)
      2. 4.7.2 Crypto Express6S feature (FC 0893)
      3. 4.7.3 Crypto Express5S feature (FC 0890)
    8. 4.8 Integrated Firmware Processor
    9. 4.9 zEDC Express
  8. Chapter 5. Central processor complex channel subsystem
    1. 5.1 Channel subsystem
      1. 5.1.1 Multiple logical channel subsystems
      2. 5.1.2 Multiple subchannel sets
      3. 5.1.3 Channel path spanning
    2. 5.2 I/O configuration management
    3. 5.3 Channel subsystem summary
  9. Chapter 6. Cryptographic features
    1. 6.1 Cryptography enhancements on IBM z14 ZR1
    2. 6.2 Cryptography overview
      1. 6.2.1 Modern cryptography
      2. 6.2.2 Kerckhoffs’ principle
      3. 6.2.3 Keys
      4. 6.2.4 Algorithms
    3. 6.3 Cryptography on IBM z14 ZR1
    4. 6.4 CP Assist for Cryptographic Functions
      1. 6.4.1 Cryptographic synchronous functions
      2. 6.4.2 CPACF protected key
    5. 6.5 Crypto Express6S
      1. 6.5.1 Cryptographic asynchronous functions
      2. 6.5.2 Crypto Express6S as a CCA coprocessor
      3. 6.5.3 Crypto Express6S as an EP11 coprocessor
      4. 6.5.4 Crypto Express6S as an accelerator
      5. 6.5.5 Managing Crypto Express6S
    6. 6.6 TKE workstation
      1. 6.6.1 Logical partition, TKE host, and TKE target
      2. 6.6.2 Optional smart card reader
      3. 6.6.3 TKE hardware support and migration information
    7. 6.7 Cryptographic functions comparison
    8. 6.8 Cryptographic operating system support for z14 ZR1
  10. Chapter 7. Operating system support
    1. 7.1 Operating systems summary
    2. 7.2 Support by operating system
      1. 7.2.1 z/OS
      2. 7.2.2 z/VM
      3. 7.2.3 z/VSE
      4. 7.2.4 z/TPF
      5. 7.2.5 Linux on Z
      6. 7.2.6 KVM hypervisor
    3. 7.3 z14 ZR1 features and function support overview
      1. 7.3.1 Supported CPC functions
      2. 7.3.2 Coupling and clustering
      3. 7.3.3 Network connectivity
      4. 7.3.4 Cryptographic functions
      5. 7.3.5 Special purpose features
    4. 7.4 Support by features and functions
      1. 7.4.1 LPAR configuration and management
      2. 7.4.2 Base CPC features and functions
      3. 7.4.3 Coupling and clustering features and functions
      4. 7.4.4 Storage connectivity-related features and functions
      5. 7.4.5 Networking features and functions
      6. 7.4.6 Cryptography features and functions support
      7. 7.4.7 Special-purpose features and functions
    5. 7.5 z/OS migration considerations
      1. 7.5.1 General guidelines
      2. 7.5.2 Hardware Fix Categories (FIXCATs)
      3. 7.5.3 Coupling links
      4. 7.5.4 z/OS XL C/C++ considerations
      5. 7.5.5 z/OS V2.3
    6. 7.6 z/VM migration considerations
      1. 7.6.1 z/VM 7.1
      2. 7.6.2 z/VM 6.4
      3. 7.6.3 ESA/390-compatibility mode for guests
      4. 7.6.4 Capacity
    7. 7.7 z/VSE migration considerations
    8. 7.8 Software licensing
    9. 7.9 References
  11. Chapter 8. System upgrades
    1. 8.1 Upgrade types
      1. 8.1.1 Overview of upgrade types
      2. 8.1.2 CoD for z14 ZR1 systems terminology
      3. 8.1.3 Permanent upgrades
      4. 8.1.4 Temporary upgrades
    2. 8.2 Concurrent upgrades
      1. 8.2.1 Upgrades
      2. 8.2.2 Customer Initiated Upgrade facility
      3. 8.2.3 Concurrent upgrade functions summary
    3. 8.3 Miscellaneous equipment specification upgrades
      1. 8.3.1 MES upgrade for PUs
      2. 8.3.2 MES upgrades for memory
      3. 8.3.3 MES upgrades for I/O
      4. 8.3.4 Feature on Demand
      5. 8.3.5 Plan-ahead feature
    4. 8.4 Permanent upgrade through the CIU facility
      1. 8.4.1 Ordering
      2. 8.4.2 Retrieval and activation
    5. 8.5 On/Off Capacity on Demand
      1. 8.5.1 Overview
      2. 8.5.2 Capacity Provisioning Manager
      3. 8.5.3 Ordering
      4. 8.5.4 On/Off CoD testing
      5. 8.5.5 Activation and deactivation
      6. 8.5.6 Termination
      7. 8.5.7 z/OS capacity provisioning
    6. 8.6 Capacity for Planned Event
    7. 8.7 Capacity Backup
      1. 8.7.1 Ordering
      2. 8.7.2 CBU activation and deactivation
      3. 8.7.3 Automatic CBU enablement for GDPS
    8. 8.8 Nondisruptive upgrades
      1. 8.8.1 Components
      2. 8.8.2 Concurrent upgrade considerations
    9. 8.9 Summary of Capacity on-Demand offerings
  12. Chapter 9. Reliability, availability, and serviceability
    1. 9.1 RAS strategy
    2. 9.2 Structure change
    3. 9.3 Technology change
    4. 9.4 Reducing complexity
    5. 9.5 Reducing touches
    6. 9.6 z14 ZR1 availability characteristics
    7. 9.7 z14 ZR1 RAS functions
      1. 9.7.1 Scheduled outages
      2. 9.7.2 Unscheduled outages
    8. 9.8 z14 ZR1 Enhanced Driver Maintenance
      1. 9.8.1 Resource Group and native PCIe MCLs
    9. 9.9 RAS capability for the HMC and SE
  13. Chapter 10. Environmental requirements
    1. 10.1 Power and cooling
      1. 10.1.1 Power requirements and consumption
      2. 10.1.2 Cooling requirements
    2. 10.2 Physical specifications
    3. 10.3 Physical planning
      1. 10.3.1 Raised floor or non-raised floor
      2. 10.3.2 Top Exit cabling feature (optional)
      3. 10.3.3 Top or bottom exit cables
      4. 10.3.4 Bottom Exit cabling feature
      5. 10.3.5 Frame Bolt-down kit
      6. 10.3.6 Service clearance areas
    4. 10.4 Energy management
      1. 10.4.1 Environmental monitoring
  14. Chapter 11. Hardware Management Console and Support Elements
    1. 11.1 Introduction to the HMC and SE
    2. 11.2 HMC and SE changes and new features
      1. 11.2.1 Driver Level 36 HMC and SE new features
      2. 11.2.2 Driver Level 32 HMC and SE changes and features
      3. 11.2.3 Firmware Integrity Monitoring and z14 HMC
      4. 11.2.4 Rack-mounted HMC
      5. 11.2.5 New SEs
      6. 11.2.6 New backup options for HMCs and primary SEs
      7. 11.2.7 SE driver support with the HMC driver
      8. 11.2.8 HMC feature codes
      9. 11.2.9 User interface
      10. 11.2.10 Customize Product Engineering Access: Best practice
    3. 11.3 HMC and SE connectivity
      1. 11.3.1 Network planning for the HMC and SE
      2. 11.3.2 Hardware prerequisite changes
      3. 11.3.3 TCP/IP Version 6 on the HMC and SE
      4. 11.3.4 OSA Support Facility changes
      5. 11.3.5 Assigning addresses to the HMC and SE
      6. 11.3.6 HMC Multi-factor authentication
    4. 11.4 Remote Support Facility
      1. 11.4.1 Security characteristics
      2. 11.4.2 RSF connections to IBM and Enhanced IBM Service Support System
      3. 11.4.3 HMC and SE remote operations
    5. 11.5 HMC and SE capabilities
      1. 11.5.1 Central processor complex management
      2. 11.5.2 LPAR management
      3. 11.5.3 Operating system communication
      4. 11.5.4 HMC and SE microcode
      5. 11.5.5 Monitoring
      6. 11.5.6 Capacity on-demand support
      7. 11.5.7 Server Time Protocol support
      8. 11.5.8 CTN Split and Merge
      9. 11.5.9 NTP client and server support on the HMC
      10. 11.5.10 Security and user ID management
      11. 11.5.11 HMC 2.14.1 Enhancements
      12. 11.5.12 System Input/Output Configuration Analyzer on the SE and HMC
      13. 11.5.13 Automated operations
      14. 11.5.14 Cryptographic support
      15. 11.5.15 Installation support for z/VM that uses the HMC
      16. 11.5.16 Dynamic Partition Manager
  15. Chapter 12. Performance
    1. 12.1 IBM z14 ZR1 performance characteristics
    2. 12.2 LSPR workload suite
    3. 12.3 Fundamental components of workload performance
      1. 12.3.1 Instruction path length
      2. 12.3.2 Instruction complexity
      3. 12.3.3 Memory hierarchy and memory nest
    4. 12.4 Relative Nest Intensity
    5. 12.5 LSPR workload categories based on relative nest intensity
    6. 12.6 Relating production workloads to LSPR workloads
    7. 12.7 Workload performance variation
      1. 12.7.1 Main performance improvement drivers with z14 ZR1 servers
  16. Appendix A. IBM Secure Service Container framework
    1. A.1 What is IBM Secure Service Container?
    2. A.2 SSC LPAR
    3. A.3 Why Secure Service Container?
    4. A.4 IBM Z and Secure Service Container
  17. Appendix B. Channel options
  18. Appendix C. Native Peripheral Component Interconnect Express
    1. C.1 Design of native PCIe adapter management
    2. C.2 Native PCIe adapters plugging rules
    3. C.3 Native PCIe adapter definitions
  19. Appendix D. Shared Memory Communications
    1. D.1 Overview
    2. D.2 Shared Memory Communication over RDMA
      1. 12.7.2 RoCE Express/Express2 configuration example
    3. D.3 Shared Memory Communications - Direct Memory Access
  20. Appendix E. IBM Dynamic Partition Manager
    1. E.1 Introduction
    2. E.2 Why use DPM?
    3. E.3 DPM overview
    4. E.4 Setting up the DPM environment
  21. Appendix F. IBM zEnterprise Data Compression Express
    1. F.1 Overview
    2. F.2 zEDC Express
    3. F.3 Software support
  22. Appendix G. 16U Reserved feature
    1. G.1 General rules
    2. G.2 Basic physical requirements
  23. Related publications
    1. IBM Redbooks
    2. Other publications
    3. Online resources
    4. Help from IBM
  24. Back cover

Product information

  • Title: IBM z14 ZR1 Technical Guide
  • Author(s): Octavian Lascu
  • Release date:
  • Publisher(s): IBM Redbooks
  • ISBN: None