May 2016
Intermediate to advanced
662 pages
20h 17m
English
book
Intel Xeon Phi Processor High Performance Programming, 2nd Edition
by James Jeffers, James Reinders, Avinash Sodani
Content preview from Intel Xeon Phi Processor High Performance Programming, 2nd Edition
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Chapter 16
PGAS programming models
Abstract
Takes a look at Partitioned Global Address Space (PGAS) programming models, which scale across cores and nodes while preserving a shared memory-like programming model. While Knights Landing will be programmed mostly with MPI, OpenMP, and TBB, utilizing PGAS models will be increasingly important in the future. Examples illustrate that PGAS can be an effective programming model for the large number of cores on a Knights Landing.
Keywords
PGAS; OpenSHMEM; SHMEM; Global Arrays; MPI RMA; UPC; Coarray; Fortran 2008; Chapel; One-sided communication; RDMA; NUMA; Active messages; Processing element
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