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Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL
book

Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

by Mohammed Ferdjallah
July 2011
Intermediate to advanced content levelIntermediate to advanced
225 pages
6h 22m
English
Wiley
Content preview from Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL

4.3 HARDWARE DESCRIPTION LANGUAGES

A hardware description language (HDL) is a programming language used to describe the behavior or structure of digital circuits (ICs). HDLs are also used to stimulate the circuit and check its response. Many HDLs are available, but VHDL and Verilog are by far the most popular. Most CAD tools available in the market support these languages. VHDL stands for “very high-speed integrated-circuit hardware description language.” Both VHDL and Verilog are officially endorsed IEEE (Institute of Electrical and Electronics Engineers) standards. Other HDLs include JHDL (Java HDL), and proprietary HDLs such as Cypress Semiconductor Corporation's Active-HDL.

In the 1980s, the rapid advances in IC technology necessitated a need to standardize design practices. In 1983, VHDL was developed under the VHSIC program of the U.S. Department of Defense. It was originally intended to serve as a language to document descriptions of complex digital circuits. It was also used to describe the behavior of digital circuits and could be fed to software tools that were used to simulate a circuit's operation. In 1987, IEEE adopted the VHDL language as standard 1076 (also referred to, as VHDL-87). It was revised in 1993 as the standard VHDL-93. Verilog HDL and a simulator were released by Gateway Design Automation in 1983. In 1989, Cadence Design Systems acquired Gateway Design Automation. In 1990, Cadence separated the HDL from its simulator (Verilog-XL) and released the HDL into ...

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Publisher Resources

ISBN: 9780470900550Purchase book