Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

Exercises

1:	Suppose that a computer architecture with a 16-bit instruction word allocates a 4-bit field for opcodes and two 6-bit fields for operands. What is the maximum number of opcodes? What is the maximum number of locations that can be accessed by direct addressing?
2:	What is the maximum overall effective number of detailed opcodes, taking into account not only the major opcode field of instructions but also the template targeting of instructions to one of five kinds of specialized CPU functional units in an implementation of Itanium architecture? How many bits would have been necessary to achieve the same effect in an ordinary opcode field as more typically seen for other ISA architectures?
3:	What criterion based upon binary representation ...