Itanium® Architecture for Programmers: Understanding 64-Bit Processors and EPIC Principles

4.5. Data Access Instructions

We now discuss data access using the Itanium load and store instructions, concentrating on simple integer data. As we mentioned in Chapter 2, modern computer designs almost invariably have a memory subsystem that is supplemented by cache structures designed to shorten access times.

For some architectures, the presence and nature of cache structures are left entirely to implementation. Cache is then not a concern of architecture, since there is no way to interact with cache structures through the instruction set. One can only observe the effect of the cache by comparing the execution times of a benchmark program on systems that have or that lack particular cache structures.

For other architectures, especially Itanium ...