Itanium Rising: Breaking Through Moore's Second Law of Computing Power

EPIC's Break From RISC

EPIC is not an evolutionary 'extension' of RISC. In fact, it's a break from the RISC away of doing things.

As opposed to RISC, (Reduced Instruction Set Computing), the new EPIC stands for 'Explicitly Parallel Instruction Computing.' True to its name, the key difference between the two forms of architecture is that EPIC allows the computer to run more instructions at the same time—i.e., in parallel. By completing more than one instruction per CPU clock cycle, there's a corresponding gain in speed, as if you had invested in a much faster processor.

The standard method of speeding up a processor is to turn up the clock speed. The designers enable this by shrinking the distance between components, shrinking the line size on ...