Linear Circuit Design Handbook

D

DAC:

3-bit switched-capacitor, circuit, 376

8-bit, nonlinear transfer function, 367–368

12-bit, SFDR, FFT, 286–287

architecture, 340–369

R-2R ladder, 349–352

basic, diagram, 340

charge-redistribution, 376, 377

current-output architecture, 345, 346

deglitcher, using SHA, 555

digital interfacing, 360–364

distortion, 474, 477

double buffered, 360–361

complex input structures, diagram, 361

dynamic performance, 474

fully decoded, 345–347

gain, in R-2R ladder, 350

general nonlinear, diagram, 369

glitch impulse area, 475–476

high speed:

alternate loading, diagram, 361, 362

buffering using differentia amplifier, 360

output, model, 357

ideaI 12-bit, SFDR, output spectrum, 283

input and output definitions, 309

intentionally nonlinear, ...