Chapter 16: Getting the Most Out of the Pin Controller and GPIO Subsystems
System-on-chips (SoCs) are becoming more and more complex and feature-rich. These features are mostly exposed through electrical lines originating from the SoC and are called pins. Most of these pins are routed to or multiplexed with several functional blocks (for instance, UART, SPI, RGMI, General-Purpose Input Output (GPIO), and so on), and the underlying device responsible for configuring these pins and switching between operating modes (switching between functional blocks) is called the pin controller.
One mode in which such pins can be configured is GPIO. Then comes the Linux GPIO subsystem, which enables drivers to read signals on GPIO configured pins as high or ...
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