Usually having a single interrupt from the CPU is not enough. Most systems have hundreds of them. That is where the interrupt controller comes in, allowing them to be multiplexed. Very often, architecture or platform-specific interrupt controllers offer specific facilities, such as:
- Masking/unmasking individual interrupts
- Setting priorities
- SMP affinity
- Exotic things, such as wake-up interrupts
IRQ management and interrupt controller drivers both rely on the IRQ domain, which is, in turn, built on top of the following structures:
- struct irq_chip: This structure implements a set of methods describing how to drive the interrupt controller, which are directly called by the core IRQ code.
