Logic Designer's Handbook, 2nd Edition

Logic Designer's Handbook, 2nd Edition

by E. A. Parr
Released October 2013
Publisher(s): Newnes
ISBN: 9781483292809

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Book description

Easy-to-read, but nonetheless thorough, this book on digital circuits is for use by students and engineers, and is a readily accessible source of data on devices in the TTL and CMOS families. The book is written to be used as a Designer's Handbook and will spend its days on the designer's bench rather than their bookshelf. The basic theory is explained and then supported with specific practical examples.



* Revised, enlarged, reduced price edition * Easy-to-read, jargon free book suitable for professionals and students * Plenty of basic theory and practical information * Based on authors practical experience of logic design * Combined textbook/reference book

Table of contents

  1. Front Cover
  2. Logic Designer's Handbook: Circuits and Systems
  3. Copyright Page
  4. Table of Contents
  5. Dedication
  6. Preface to the Second Edition
  7. Preface to the First Edition
  8. Chapter 1. Fundamental Theory
    1. 1.1 Analog and digital circuits
    2. 1.2 Relay and switching circuits
    3. 1.3 Logic gates
    4. 1.4 Mathematical principles (1/2)
    5. 1.4 Mathematical principles (2/2)
    6. 1.5 Specifications (1/2)
    7. 1.5 Specifications (2/2)
    8. 1.6 Integrated circuits
  9. Chapter 2. Logic Families
    1. 2.1 Introduction
    2. 2.2 Resistor Transistor Logic (RTL)
    3. 2.3 Diode Transistor Logic (DTL)
    4. 2.4 Complementary Transistor Logic (CTL)
    5. 2.5 Direct Coupled Transistor Logic (DCTL) and Integrated Injection Logic (I2L)
    6. 2.6 Emitter Coupled Logic (ECL) and Common Mode Logic (CML)
    7. 2.7 Transistor Transistor Logic (TTL) 35
    8. 2.8 Complementary Metal Oxide Semiconductor (CMOS) logic
    9. 2.9 Industrial logic families
    10. 2.10 Choosing a lgic family
  10. Chapter 3. Combinational Logic
    1. 3.1 Introduction
    2. 3.2 Logic gates (1/4)
    3. 3.2 Logic gates (2/4)
    4. 3.2 Logic gates (3/4)
    5. 3.2 Logic gates (4/4)
    6. 3.3 Combinational design and minimization (1/4)
    7. 3.3 Combinational design and minimization (2/4)
    8. 3.3 Combinational design and minimization (3/4)
    9. 3.3 Combinational design and minimization (4/4)
    10. 3.4 Hazards, races and glitches
    11. 3.5 Data selectors and decoders
    12. 3.6 Formal minimization, the Quine-McCluskey method
    13. 3.7 ROM and PROM logic
    14. 3.8 UCLAs, PALs, and PLAs
    15. 3.9 Gates and other combinational logic ICs
  11. Chapter 4. Storage
    1. 4.1 Introduction
    2. 4.2 Cross-coupled flip-flops
    3. 4.3 Edge triggering
    4. 4.4 Transparent latch
    5. 4.5 Clocked storage (1/2)
    6. 4.5 Clocked storage (2/2)
    7. 4.6 Non-volatile storage
    8. 4.7 Practical considerations
    9. 4.8 Storage devices
  12. Chapter 5. Timers, Monostables and Oscillators
    1. 5.1 Introduction
    2. 5.2 Delays on and off
    3. 5.3 Monostables (one-shots)
    4. 5.4 Specific monostables
    5. 5.5 Long period timers (1/2)
    6. 5.5 Long period timers (2/2)
    7. 5.6 Strobes
    8. 5.7 Oscillators and clocks (1/2)
    9. 5.7 Oscillators and clocks (2/2)
    10. 5.8 Miscellaneous devices
    11. 5.9 monostables/Timers and oscillator ICs
  13. Chapter 6. Binary Arithmetic
    1. 6.1 Introduction
    2. 6.2 Number systems, bases and binary
    3. 6.3 Octal and hexadecimal representation
    4. 6.4 Addition of binary numbers
    5. 6.5 Negative numbers
    6. 6.6 Subtraction
    7. 6.7 Multiplication and division
    8. 6.8 Binary fractions
    9. 6.9 Other codings (1/2)
    10. 6.9 Other codings (2/2)
  14. Chapter 7. Counters and Shift Registers
    1. 7.1 Introduction
    2. 7.2 The toggle flip-flop
    3. 7.3 Ripple counters (1/2)
    4. 7.3 Ripple counters (2/2)
    5. 7.4 Synchronous counters (1/3)
    6. 7.4 Synchronous counters (2/3)
    7. 7.4 Synchronous counters (3/3)
    8. 7.5 Hybrid counters
    9. 7.6 Shift registers (1/2)
    10. 7.6 Shift registers (2/2)
    11. 7.7 Counter and shift register devices
  15. Chapter 8. Arithmetic Circuits
    1. 8.1 Introduction
    2. 8.2 Encoders and decoders
    3. 8.3 Binary addition
    4. 8.4 Serial/parallel arithmetic
    5. 8.5 High speed adders and look ahead carries
    6. 8.6 MSI adders
    7. 8.7 Subtraction circuits
    8. 8.8 Comparators
    9. 8.9 Multiplication and division
    10. 8.10 BCD conversion and arithmetic
    11. 8.11 Code conversion
    12. 8.12 Rate multipliers
    13. 8.13 LSI arithmetic devices
    14. 8.14 Arithmetic ICs
  16. Chapter 9. Display Devices and Drivers
    1. 9.1 Introduction
    2. 9.2 Display devices
    3. 9.3 Alphanumeric displays
    4. 9.4 Display decoders and drivers
    5. 9.5 Multiplexing displays
    6. 9.6 Composite drivers
    7. 9.7 VDU fundamentals
    8. 9.8 Display-related ICs
  17. Chapter 10. Event Driven Logic
    1. 10.1 Introduction
    2. 10.2 State diagrams
    3. 10.3 From state diagram to circuit (1/2)
    4. 10.3 From state diagram to circuit (2/2)
    5. 10.4 General observations
  18. Chapter 11. Communications and Highways
    1. 11.1 Introduction
    2. 11.2 Transmission lines
    3. 11.3 Line driver ICs
    4. 11.4 Highway-based systems and buses
    5. 11.5 Data communications
    6. 11.6 Serial standards (1/3)
    7. 11.6 Serial standards (2/3)
    8. 11.6 Serial standards (3/3)
    9. 11.7 Communication ICs
  19. Chapter 12. Analog Interfacing
    1. 12.1 Introduction
    2. 12.2 The transmission gate
    3. 12.3 The Schmitt trigger
    4. 12.4 Digital to analog conversion
    5. 12.5 Analog to digital conversion (1/2)
    6. 12.5 Analog to digital conversion (2/2)
    7. 12.6 Analog/digital ICs
  20. Chapter 13. Practical Considerations
    1. 13.1 Introduction
    2. 13.2 Construction techniques
    3. 13.3 Noise
    4. 13.4 Mixing logic families
    5. 13.5 Interfacing to the outside world
    6. 13.6 Maintenance and fault finding (1/2)
    7. 13.6 Maintenance and fault finding (2/2)
    8. 13.7 Power suplies
    9. 13.8 Logic design with computers (1/2)
    10. 13.8 Logic design with computers (2/2)
  21. Chapter 14. Device Information
    1. 14.1 Introduction
    2. 14.2 TTL and 74 series CMOS devices
    3. 14.3 B series CMOS devices (1/13)
    4. 14.3 B series CMOS devices (2/13)
    5. 14.3 B series CMOS devices (3/13)
    6. 14.3 B series CMOS devices (4/13)
    7. 14.3 B series CMOS devices (5/13)
    8. 14.3 B series CMOS devices (6/13)
    9. 14.3 B series CMOS devices (7/13)
    10. 14.3 B series CMOS devices (8/13)
    11. 14.3 B series CMOS devices (9/13)
    12. 14.3 B series CMOS devices (10/13)
    13. 14.3 B series CMOS devices (11/13)
    14. 14.3 B series CMOS devices (12/13)
    15. 14.3 B series CMOS devices (13/13)
  22. Index (1/2)
  23. Index (2/2)

Product information

  • Title: Logic Designer's Handbook, 2nd Edition
  • Author(s): E. A. Parr
  • Release date: October 2013
  • Publisher(s): Newnes
  • ISBN: 9781483292809