Chapter 14
Channel Emulators for Emerging Communication Systems
14.1 Introduction
The aim of a hardware channel emulator is to present accurate and sufficiently varied representations of the required channel environment (e.g., indoor, urban or rural and so on) to the hardware receiver system. The channel emulator presents a physical interface to measure the performance under repeatable conditions for a transceiver-under-test. The emulator assists in understanding the effects of key Multiple Input Multiple Output (MIMO) channel parameters, and enables accurate Bit Error Rate (BER) results to be obtained, for a number of channel scenarios and receiver parameters, in a much shorter time than is possible by simulation on a desktop computer.
Channel fading depends on a considerable number of physical processes and parameters (i.e., many reflections, refractions, diffraction and so on) all of which cannot be simulated in real-time on a single Field Programmable Gate Array (FPGA) device without simplifying assumptions. Furthermore, in recent years the complexity has increased not only with multiple antennas elements, but also in modeling the number of resolved paths and sub-paths. Therefore the objective is to accurately model the key fading processes under the constraint of limited hardware resources. Fortunately, the size of FPGAs in terms of the number of gates has rapidly increased from just 64 logic cells in 1985 (Xilinx XC2064) up to 2 million ...
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