book

Make: FPGAs

Name: Make: FPGAs
Author: David Romano
ISBN: 9781457187810

by David Romano

February 2016

Intermediate to advanced

256 pages

5h 23m

English

Make: Community

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Preface
FPGA HistoryAbout the BookConventions Used in This BookUsing Code ExamplesSafari® Books OnlineHow to Contact UsAcknowledgments
1. Overview
PapilioOpal KellyRed PitayaNumato LabDesign FlowConcept PhaseDesign PhaseTest PhaseSynthesize PhaseBuild PhaseRun PhaseTakeaways
2. Count on It!
Blink LEDs ConceptHow It WorksXilinx ISE WebPACK InstallationDesignPeripheral BreadboardFPGA Circuit Schematic Design EntryFPGA Circuit HDL Design EntrySimulationBuildCreating the Constraints FileOpen Kelly SetupSetup TestClock Frequency ExperimentationTakeaways
3. That’s Refreshing
Stopwatch ConceptHow It WorksDesignPeripheral BreadboardFPGA CircuitDigital Clock Manager (DCM)Verilog Code and ConcurrencySimulationBuildAssigning Physical I/OTakeaways
4. Testing 1, 2, 3, 4
The Test BenchTest Bench AnatomyReuseRunning the Test Bench ProjectStep 1: Selection and Download of CoreStep 2: DocumentationStep 3: RTLStep 4: Adding Test Bench Files and Running the SimulationExploring the Test Bench ProjectOverviewTakeaways
5. It Does Not Compute
The CARDIAC Computer ModelGetting Started with VTACHNumato Elbert V2 SetupModificationsStep 1: Device SectionStep 2: Pin AssignmentsStep 3: ClockingStep 4: I/O PolarityStep 5: Memory Block UpdateDesign, Build, and SimulationSimulationBuilding and RunningPrograming and AssemblerTakeaways
6. It’s a Small World!
System on ChipSoC ArchitectureDesignLabInstallationPapilio DUO SetupStep 1: Power UpStep 2: Select COM PortStep 3: Create ProjectStep 4: Associate CircuitStep 5: Load FPGA Bit FileStep 6: Compile and Upload SketchGetting Started with the DesignLab Video-Audio PlayerHow It WorksDesignStep 1: Create New DesignLab ProjectStep 2: Edit Your Design in Xilinx ISEStep 3: Add VGA Adapter BlockStep 4: Add Audio BlocksStep 5: Implement and Generate Bit FileStep 6: Create Sketch, Load, and RunExperimentsSource CodeTakeaways
7. Just for the Fun of It
Getting Started with VGA-Displayed Arcade GamesHow It WorksLoading a GameSource Code and ROM FilesGetting Started with LED Dot Matrix–Displayed Arcade GamesHow It WorksDesignExperimentsSource CodeTakeaways
8. Cha-Ching!
Getting Started with the Bitcoin MinerHow It WorksDesignSource CodeTakeaways
9. I Hear You!
Getting Started with the SDR ReceiverHow It WorksRed Pitaya SetupLoading the SDRStep 1: Copy Red Pitaya SD Card ImageStep 2: Install SDR Applications on PCStep 3: Connect Red Pitaya to the NetworkStep 4: Run SDR ApplicationsSource CodeTakeaways

A. FPGA Boards
B. Papilio AVR Loading
Step 1: Power UpStep 2: Change Circuit DirectiveStep 3: Load FPGA Bit FileStep 4: Change COM PortStep 5: Compile and Upload SketchSerial MonitorAdditional Resources
C. Text and Code Editor
Index

Content preview from Make: FPGAs

Appendix B. Papilio AVR Loading

If you want to check out the operation of the Papilio AVR (Arduino microcontroller), there are a few additional steps you will need to complete.

Step 1: Power Up

First, plug your other USB-Micro cable into the Papilio module and move SW1 to the “up” position. You still need to have the FPGA USB cable connected to the USB-Mini connector. You don’t have to change the PWRSEL jumper for this exercise.

You’ll notice now that there are two Papilio DUOs listed in DesignLab’s Tools→Port submenu: one for the FPGA and one for the AVR. You’ll need to select the FPGA COM port first, as shown in Figure B-1.

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Make: FPGAs

by David Romano

Appendix B. Papilio AVR Loading

Step 1: Power Up

Figure B-1. Select ...

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