Chapter 2. Count on It!
Basic FPGA Design Flow Using a Frequency Divider Circuit
In this chapter, I’ll walk you through a basic FPGA design flow using a simple frequency divider circuit. I recommend that everyone read through this chapter just to review the basics. If you are new to FPGAs and FPGA design methods, this will be a very practical guide for you. If you have some experience designing with FPGAs, then you may find this to be a good refresher.
I’ll be going through, in some very detailed steps, installing the Xilinx ISE tool, creating a project in the Xilinx ISE tool, creating a schematic and Verilog source file, synthesis, basic simulation, creating a user constraints file (UCF), bit file generation, and programming your target FPGA ...
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