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Managing Power Electronics: VLSI and DSP-Driven Computer Systems by Nazzareno Rossetti

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Chapter 5

Offline (AC-DC) Architectures

5.1 Offline Power Architectures

Introduction

System On a Chip (SOC) companies are claiming that the entire signal path (digital + analog + memory) and even a full GSM system—including power management—will be integrated in the next few years. However, the reality is that this up-integration march, fueled by nano-scale lithography (minimum features less than 100 nm), ends up defining the product's own technology boundaries: the higher the number of transistors on a chip, the lower their voltage and the more fragile their technology. At the 0.13 μm juncture, for example, the SOC processes work at voltages in the range of 1 V–2 V!

At the other end of the spectrum are the power chip companies creating technologies to deal with high voltages and high currents. Drawing power from the AC line down to an intermediate bus voltage requires robust devices capable of sustaining several hundred volts at several amperes. At the same time, the conversion from bus voltage to final load often requires low voltages at hundreds of amperes of current.

The way power conversion requirements are met in a PC application, from line Power Factor Correction (PFC) to intermediate bus voltage out of the silver box, down to the popular low voltages on the motherboard, nicely illustrates the new high-voltage and high-current silicon technologies and architectures. To describe this evolving power conversion technology, this chapter provides an application example of Fairchild's ...

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