Processors based on the Intel architecture have a set of control registers that are used for configuration of the processor at run time (such as switching between execution modes). These registers are 32-bit wide on x86 and 64-bit wide on AMD64 (long mode).
There are six control registers and one Extended Feature Enable Register (EFER):
- CR0: This register contains various control flags that modify the basic operation of the processor.
- CR1: This register is reserved for future use.
- CR2: This register contains the Page Fault Linear Address when a page fault occurs.
- CR3: This register is used when virtual addressing is enabled (paging) and contains the physical address of the page directory, page directory pointer table, or ...
