© The Author(s), under exclusive license to APress Media, LLC, part of Springer Nature 2024
H. H. WardMastering Digital ElectronicsMaker Innovations Serieshttps://doi.org/10.1007/978-1-4842-9878-7_6

6. State Example 3 A Bit Stream Monitor

Hubert Henry Ward1  
(1)
Leigh, UK
 

In this chapter we will look at how a structured design method can be applied to designing synchronous counters. The method we will use makes use of “state diagrams.” We will learn how to interpret these state diagrams and use them to design a variety of sequential logic circuits.

State Diagrams

These are a pictorial representation of how a sequential logic system will change from one state to another state. They consist of nodes in which the state of the internal logic elements

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