Microprocessor 4

2Instruction Set and Class

This chapter focuses on perhaps the most important characteristic of an ISA (Instruction Set Architecture, cf. § V1-3.5), which is a processor’s instruction set. We define and propose how to classify instructions, and then present the different instruction families for a generic microprocessor as well as the possible extensions for this set.

2.1. Definitions

Instructions differ depending on their designers in their number, name, mnemonic, the number of operands and addressing modes and in their syntax. From their designation (i.e. name and mnemonic), these characteristics depend on the type of architecture and ISA (cf. § V1-3.5). We must distinguish the instruction name, which always begins with an action verb indicating the operation to be executed (e.g. move) from its symbolic or mnemonic name, which is either its abridged instruction name (e.g. mov) or an acronym that always begins with the first letter of the action verb according to IEEE standard (Std) 694-1985 (IEEE 1985) (cf. § V5-1.3.2). One benefit of this choice is that the alphabetic order corresponds to the function, with some exceptions. This facilitates a modern microprocessor’s (MPU for MicroProcessor Unit) reading of several thousand pages of documents. Still following the recommendations of this standard, it should not include any integrated addressing mode specification, or integrated operand name. The execution conditions are integrated. The type of operand specified in the suffix ...