Microprocessors and Microcontrollers by Pearson

Microprocessors and Microcontrollers by Pearson

by Lyla B Das
Released May 2024
Publisher(s): Pearson India
ISBN: 9781299445468

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Book description

The book is designed for undergraduate courses on the 16-bit microprocessor and specifically for the syllabus of JNTU-K. The text comprehensively covers both the hardware and software aspects of the subject with equal emphasis on architecture, programming, and interfacing. All concepts are presented with worked-out examples and programs.

About The Author –

Lyla B. Das is Associate Professor, Department of Electronics Engineering, National Institute of Technology Calicut (NITC), Kerala. She has a diverse mix of industrial, teaching and research experience spanning about 30 years. As a young graduate specializing in Electronics and Communications from the College of Engineering, Trivandrum, Lyla B. Das joined Keltron Controls as Deputy Engineer in 1981. Four years later, she joined NITC (then Regional Engineering College, Calicut) as lecturer and proceeded to complete her master’s degree in digital communications from the same college. Over the years, she was successively elevatedas Assistant Professor and then Associate Professor, a position which she currently holds.

Keen to actively seek and impart knowledge, Lyla B. Das currently teaches courses on microprocessors, microcontrollers, digital system design using VHDL, and system design using embedded processors at the undergraduate as well as postgraduate level. She has presented research papers at conferences of national and international stature and has worked on numerous projects based on microprocessors and microcontrollers, such as microprocessor-based voting machines and microcontroller-based rail track switching systems. An avid reader of contemporary research material, she keeps herself abreast of the current trends in her chosen field and guides students in their M. Tech. research theses.

Lyla B. Das has worked on various projects funded by the ministry of human resource development (MHRD) in thrust areas of growth including the setting up of an embedded systems laboratory in 2005–2008. She has delivered expert lectures on image compression using wavelets, advanced microprocessors and microcontrollers, FPGA-based systems and embedded systems at several engineering colleges across Kerala. She has also participated in numerous tutorials and workshops conducted by the Indian Institute of Technology (IIT) and the Indian Institute of Science (IISc). She was a Fellow in the national conference on ‘VLSI Design and Embedded Systems’ held at IISc Bangalore (2003) and IIT Mumbai (2004). She is a life member of the System Society of India and a member of the Indian Society for Technical Education and the Computer Society of India.

Table of contents

  1. Cover (1/2)
  2. Cover (2/2)
  3. Contents (1/2)
  4. Contents (2/2)
  5. Preface
  6. About the Author
  7. Roadmap to the Syllabus
  8. Chapter 0: Basics of Computer Systems
    1. 0.1 A Brief History of Microprocessors
      1. 0.1.1 The x86 Family
      2. 0.1.2 The x86 Philosophy
      3. 0.1.3 Personal Computers
    2. 0.2 Basics of Computer Architecture
      1. 0.2.1 The Block Diagram of a Computer
      2. 0.2.2 The System Bus
      3. 0.2.3 The Processor
      4. 0.2.4 System Clock
      5. 0.2.5 Memory
      6. 0.2.6 The I/O System
    3. 0.3 Computer Languages
      1. 0.3.1 Machine Language, Assembly Language and High Level Language
      2. 0.3.2 Comparison
    4. 0.4 RISC and CISC Architectures
    5. 0.5 Number Systems
      1. 0.5.1 The Decimal System
      2. 0.5.2 The Binary Number System
      3. 0.5.3 The Hexadecimal Number System
    6. 0.6 Number Format Conversions
      1. 0.6.1 Conversion from Decimal to Binary
      2. 0.6.2 Conversion from Decimal to Hexadecimal
      3. 0.6.3 Converting from Binary to Hexadecimal
      4. 0.6.4 BCD Numbers
      5. 0.6.5 ASCII Code
      6. 0.6.6 Representation of Negative Numbers
    7. 0.7 Computer Arithmetic
      1. 0.7.1 Addition of Unsigned Numbers
      2. 0.7.2 Addition of Packed BCD Numbers
      3. 0.7.3 Addition of Negative Numbers
      4. 0.7.4 Subtraction
      5. 0.7.5 Packed BCD Subtraction
      6. 0.7.6 Subtraction of Signed Numbers
      7. 0.7.7 Addition of Numbers of Different Lengths
    8. 0.8 Units of Memory Capacity
    9. 0.9 The 8085 Microprocessor
      1. 0.9.1 The Programming Model of 8085
      2. 0.9.2 Assembly Language Programming
        1. 0.9.2.1 Modes of Addressing
      3. 0.9.3 Instruction set of 8085
        1. 0.9.3.1 Data Transfer Instructions
        2. 0.9.3.2 Arithmetic Instructions
        3. 0.9.3.3 Branch Instructions
        4. 0.9.3.4 Logical and Bit Manipulation Instructions
      4. 0.9.4 Hardware Aspects of the 8085 (1/2)
      5. 0.9.4 Hardware Aspects of the 8085 (2/2)
        1. 0.9.4.1 Multiplexed Address/Data Bus
        2. 0.9.4.2 Read and Write
        3. 0.9.4.3 Power Supply and Clock
        4. 0.9.4.4 Reset and Ready Pins
        5. 0.9.4.5 Interrupt
        6. 0.9.4.6 Hold and HLDA
        7. 0.9.4.7 SID and SOD
    10. Key Points of this Chapter
    11. Questions
    12. Exercises
  9. Chapter 1: The Architecture of 8086
    1. 1.1 Internal Block Diagram of the 8086
    2. 1.2 The Execution Unit
      1. 1.2.1 The Scratchpad Registers
      2. 1.2.2 Flag Register
    3. 1.3 Bus Interface Unit
      1. 1.3.1 The Instruction Queue
      2. 1.3.2 Memory Segmentation
        1. 1.3.2.1 Segment Registers
        2. 1.3.2.2 The Code Segment and the Instruction Pointer
        3. 1.3.2.3 The Stack Segment and the Stack Pointer
        4. 1.3.2.4 The Data Segment and Extra Segment
    4. 1.4 Addressing Modes
    5. Key Points of this Chapter
    6. Questions
    7. Exercises
  10. Chapter 2: Programming Concepts – I
    1. 2.1 The Assembly Process
      1. 2.1.1 Features of Assemblers
      2. 2.1.2 Instructions and Directives
      3. 2.1.3 The Forward Reference Problem
      4. 2.1.4 Two Pass Assemblers
    2. 2.2 Assemblers for x86
      1. 2.2.1 Why MASM?
      2. 2.2.2 Assembly Language Programming
    3. 2.3 Memory Models
      1. 2.3.1 The Tiny Model
      2. 2.3.2 COM and EXE Files
      3. 2.3.3 Definition of Data Types
      4. 2.3.4 The Small Model
      5. 2.3.5 The DUP Directive
      6. 2.3.6 The EQU Directive
      7. 2.3.7 The ORG Directive
      8. 2.3.8 Other Models
      9. 2.3.9 Full Segment Definition
      10. 2.3.10 General Rules for Writing Assembly Language
        1. 2.3.10 General Rules for Writing Assembly Language
    4. 2.4 Instruction Design
      1. 2.4.1 Manual Coding
      2. 2.4.2 Instruction Set Architecture (ISA)
      3. 2.4.3 Instruction Set Design of 8086
      4. 2.4.4 Designing a Code
    5. Key Points of this Chapter
    6. Questions
    7. Exercises
  11. Chapter 3: Programming Concepts – II
    1. 3.1 Approaches to Programming
      1. 3.1.1 BIOS and DOS Function Calls
      2. 3.1.2 Using DOS Function Calls
      3. 3.1.3 The Instruction Set of 8086
    2. 3.2 Data Transfer Instructions
      1. 3.2.1 MOV – Move
      2. 3.2.2 LEA – Load Effective Address
      3. 3.2.3 XLAT – Translate a Byte in AL
      4. 3.2.4 PUSH and POP
        1. 3.2.4.1 Operation of the Stack
        2. 3.2.4.2 Defining a Stack
    3. 3.3 Branch Instructions
      1. 3.3.1 JMP – Jump
        1. 3.3.1.1 The Near Jump
        2. 3.3.1.2 The Short Jump
      2. 3.3.2 Other Forms of the Unconditional Jump Instruction
        1. 3.3.2.1 Conditional Jumps
        2. 3.3.2.2 Far Jump
      3. 3.3.3 The LOOP Instruction
    4. 3.4 Arithmetic Instructions
      1. 3.4.1 Flag Control Instructions
      2. 3.4.2 Addition Instructions
      3. 3.4.3 Subtraction
      4. 3.4.4 Compare Instruction
      5. 3.4.5 Unsigned Multiplication
      6. 3.4.6 Unsigned Division
    5. 3.5 Logical Instructions
    6. 3.6 Shift and Rotate Instructions
      1. 3.6.1 Shift
      2. 3.6.2 Rotate Instructions
    7. Key Points of this Chapter
    8. Questions
    9. Exercises
  12. Chapter4: Programming Concepts – III
    1. 4.1 String Instructions
      1. 4.1.1 The MOVS Instruction
      2. 4.1.2 The CMPS Instruction
      3. 4.1.3 The SCAS Instruction
      4. 4.1.4 The STOS and LODS Instructions
    2. 4.2 Procedures
      1. 4.2.1 Writing a Procedure
      2. 4.2.2 Call and Return Instructions
        1. 4.2.2.1 Intrasegment or ‘Near’ Call
        2. 4.2.2.2 Intersegment or Far Call
      3. 4.2.3 The RET Instruction
      4. 4.2.4 The Use of the Stack in Procedure Calls
      5. 4.2.5 Passing Parameters To and From Procedures
        1. 4.2.5.1 Passing Parameters Through Registers
        2. 4.2.5.2 Passing Parameters Through Memory
        3. 4.2.5.3 Passing Parameters Through the Stack
    3. 4.3 Macros
      1. 4.3.1 Writing a Macro
      2. 4.3.2 Using the ‘Local’ Directive in Macros
    4. 4.4 Number Format Conversions
      1. 4.4.1 Packed BCD to Unpacked BCD Conversion
      2. 4.4.2 BCD Calculations
    5. 4.5 ASCII Operations
      1. 4.5.1 ASCII Addition
      2. 4.5.2 ASCII Subtraction
      3. 4.5.3 Multiplication and Division
    6. 4.6 Conversions for Computations and Display/Entry
      1. 4.6.1 Converting ASCII Numbers to Binary Form
      2. 4.6.2 Converting Binary Numbers to ASCII Form
    7. 4.7 Signed Number Arithmetic
      1. 4.7.1 Comparison of Signed Numbers
      2. 4.7.2 Signed Multiplication and Division
      3. 4.7.3 Arithmetic Shift
    8. 4.8 Programming Using High Level Language Constructs
    9. Key Points of this Chapter
    10. Questions
    11. Exercises
  13. Chapter 5: Programming Concepts – IV
    1. 5.1 Input/Output Programming
      1. 5.1.1 Memory Mapped I/O
      2. 5.1.2 Peripheral or Isolated I/O
    2. 5.2 I/O Instructions
      1. 5.2.1 Fixed Port Addressing
      2. 5.2.2 Variable Port Addressing
    3. 5.3 Modular Programming
      1. 5.3.1 PUBLIC
      2. 5.3.2 EXTRN
      3. 5.3.3 Frequently Used Modules
    4. 5.4 Programming in C with Assembly Modules
    5. Key Points of this Chapter
    6. Questions
    7. Exercises
  14. Chapter 6: The Hardware Structure of 8086
    1. 6.1 Pin Configuration
      1. 6.1.1 Minimum Mode Pins
      2. 6.1.2 De-multiplexing the Address/Data Bus
      3. 6.1.3 Minimum Mode Pin Functions
      4. 6.1.4 The De-multiplexed Address/Data Bus
        1. 6.1.4.1The Address Bus
        2. 6.1.4.2 The Data Bus
      5. 6.1.5 Control Signals for Read and Write
      6. 6.1.6 Memory and I/O
      7. 6.1.7 Clock Generation
      8. 6.1.8 Ready
      9. 6.1.9 Reset
      10. 6.1.10 Power on Reset
    2. 6.2 Clock
      1. 6.2.1 Read Machine Cycle
      2. 6.2.2 Wait Cycles
      3. 6.2.3 Write Machine Cycle
    3. 6.3 Other Processor Activities
      1. 6.3.1 Interrupt Lines
      2. 6.3.2 DMA
      3. 6.3.3 TEST
      4. 6.3.4 Bus High Enable (BHE )
      5. 6.3.5 Halt Machine Cycle
    4. 6.4 Maximum Mode
      1. 6.4.1 Bus Controller
      2. 6.4.2 Request/Grant pins
      3. 6.4.3 Queue Status pins QS0 , QS1
      4. 6.4.4 LOCK
    5. 6.5 Instruction Cycle
      1. 6.5.1 Delay Loops
      2. 6.5.2 Why Delay Loops?
    6. Key Points of this Chapter
    7. Questions
    8. Exercises
  15. Chapter 7: Memory and I/O Decoding
    1. 7.1 Memory Device Pins
    2. 7.2 Memory Address Decoding
      1. 7.2.1 Address Decoding Concepts
      2. 7.2.2 Address Decoding Using Block Decoders
      3. 7.2.3 Partial Address Decoding
    3. 7.3 Memory Banks
      1. 7.3.1 Odd Addresses Word
      2. 7.3.2 Why Memory Banks?
      3. 7.3.3 Using Separate Write Strobes
      4. 7.3.4 Memory Map of IBM-PC
    4. 7.4 I/O Address Decoding
      1. 7.4.1 Output Ports
      2. 7.4.2 Input Ports
      3. 7.4.3 Decoding 16-Bit I/O Addresses
      4. 7.4.4 Ports with 16-Bit Data Bus
    5. Key Points of this Chapter
    6. Questions
    7. Exercises
  16. Chapter 8: The Interrupt Structure of 8086
    1. 8.1 Interrupts of 8086
      1. 8.1.1 Interrupt Response of 8086
      2. 8.1.2 Interrupt Service Routine and Interrupt Vector
      3. 8.1.3 Interrupt Vector Table
    2. 8.2 Dedicated Interrupt Types
      1. 8.2.1 INT 0 (Divide by Zero Error)
      2. 8.2.2 INT 1 (Single Stepping)
      3. 8.2.3 INT 2 (Non Maskable Interrupt)
      4. 8.2.4 INT 3 (Breakpoint Interrupt)
      5. 8.2.5 INT 4 (Overfl ow Interrupt)
      6. 8.2.6 Allocation of Interrupt Type Numbers
    3. 8.3 Software Interrupts
      1. 8.3.1 DOS and BIOS Interrupt Routines
    4. 8.4 Hardware Interrupts
      1. 8.4.1 NMI
      2. 8.4.2 INTR
    5. 8.5 Priority of Interrupts
    6. 8.6 Interrupt Type Allocation for Current PCs
      1. 8.6.1 BIOS and DOS Interrupts
      2. 8.6.2 BIOS 10H Functions
      3. 8.6.3 Video Adapter
      4. 8.6.4 History
      5. 8.6.5 Text and Graphics
      6. 8.6.6 Character Display
      7. 8.6.7 Color Configuration
    7. 8.7 BIOS 10H Functions (1/2)
    8. 8.7 BIOS 10H Functions (2/2)
    9. 8.8 Addressing Video Memory Directly
    10. 8.9 Keyboard Interfacing
      1. 8.9.1 Computer Keyboard
      2. 8.9.2 Keyboard Hardware
        1. 8.9.2.1 Keyboard Controller
        2. 8.9.2.2 Scan Code
      3. 8.9.3 Keyboard Interrupt Type 09
        1. 8.9.3.1 BIOS INT 09 Routine
      4. 8.9.4 BIOS 16H Functions
    11. 8.10 Hooking an Interrupt
      1. 8.10.1 Terminate and Stay Resident
      2. 8.10.2 DOS Functions for Interrupt Hooks
      3. 8.10.3 Hooking Into Hardware Interrupts (1/2)
      4. 8.10.3 Hooking Into Hardware Interrupts (2/2)
    12. Key Points of this Chapter
    13. Questions
    14. Exercises
  17. Chapter 9: Peripheral Interfacing – I
    1. 9.1 Trainer Kit
    2. 9.2 Programmable Peripheral Interface (PPI)-8255A
      1. 9.2.1 Pin Configuration and Internal Block Diagram
      2. 9.2.2 Programming the PPI
    3. 9.3 Modes of Operation
    4. 9.4 Mode 0
      1. 9.4.1 Interfacing 16 Bits I/O Ports to the 8255
      2. 9.4.2 Bit Set Reset Mode
    5. 9.5 Mode 1
      1. 9.5.1 Strobed Input Mode
      2. 9.5.2 Mode 1: Strobed Output (1/2)
      3. 9.5.2 Mode 1: Strobed Output (2/2)
    6. 9.6 Mode 2 (Strobed Bidirectional Bus I/O)
    7. 9.7 Centronics Printer Interface
      1. 9.7.1 History
    8. 9.8 Interfacing an Analog-to-Digital Converter to the 8086
    9. 9.9 Interfacing to a Digital-to-Analog Converter
    10. 9.10 Interfacing Liquid Crystal Displays to the 8086
      1. 9.10.1 Pins of the LCD
    11. 9.11 Interfacing a Stepper Motor to the 8086
      1. 9.11.1 Stepper Motor Types
      2. 9.11.2 Two-Phase Stepper Motors
      3. 9.11.3 Driving a Stepper Motor
        1. 9.11.3.1 Full Step Drive (two phases on)
        2. 9.11.3.2 Wave drive
        3. 9.11.3.3 Half stepping
      4. 9.11.4 Using the 8255 to Interface a Stepper Motor
      5. 9.11.5 Step Angle
      6. 9.11.6 Other Issues Regarding Stepper Motors
      7. 9.11.7 Optocouplers
    12. 9.12 Hex Keyboard Interfacing
      1. 9.12.1 Hex Keyboard
      2. 9.12.2 Detecting a Keypress
      3. 9.12.3 Identifying the Key
      4. 9.12.4 Key Debounce
    13. 9.13 Interfacing LED Displays
      1. 9.13.1 Seven Segment LED
      2. 9.13.2 Static Seven Segment Displays
      3. 9.13.3 Dynamic Display
      4. 9.13.4 An Eight-Digit Dynamic, Multiplexed Display
    14. Key Points of this Chapter
    15. Questions
    16. Exercises
  18. Chapter 10: Peripheral Interfacing – II
    1. 10.1 The Programmable Interval Timer 8253/8254
      1. 10.1.1 Counters
      2. 10.1.2 Programming the Chip
      3. 10.1.3 Control Word
      4. 10.1.4 Using all the Counters
      5. 10.1.5 Mode 0: Interrupt on Terminal Count
      6. 10.1.6 Mode 1: Programmble One Shot
      7. 10.1.7 Mode 2: Rate Generator
      8. 10.1.8 Mode 3: Square Wave Generator
      9. 10.1.9 Mode 4: Software Triggered Mode
      10. 10.1.10 Mode 5: Hardware Triggered Mode
      11. 10.1.11 Reading a Count
    2. 10.2 The Programmable Keyboard Display Interface – 8279
      1. 10.2.1 Display Interface
      2. 10.2.2 Segment Defi nition
      3. 10.2.3 Keyboard Section
      4. 10.2.4 System with Keyboard and Display Interfaced
      5. 10.2.5 Control Words
      6. 10.2.6 Detecting a Keypress
    3. 10.3 The Programmable Interrupt Controller (PIC) 8259
      1. 10.3.1 Introduction
      2. 10.3.2 8259 – Features
      3. 10.3.3 Block Diagram
      4. 10.3.4 Interrupt Sequence for an 8086 Based System
      5. 10.3.5 Using the 8259
      6. 10.3.6 Initialization Command Words (ICWs)
      7. 10.3.7 Initialization Sequence
        1. 10.3.7.1 ICW1 (Initialization Command Word1)
        2. 10.3.7.2 ICW2 (Initialization Command Word2)
        3. 10.3.7.3 ICW3 (Initialization Control Word3)
        4. 10.3.7.4 Initialization Command Word 4 (ICW4)
      8. 10.3.8 Operational Command Words
        1. 10.3.8.1 OCW 1 (Operational Command Word 1)
        2. 10.3.8.2 OCW2 (Operational Control Word2)
        3. 10.3.8.3 OCW3 (Operational Control Word 3)
    4. 10.4 Cascade Mode
      1. 10.4.1 Programmable Interrupt Controllers in the PC
    5. Key Points of this Chapter
    6. Questions
    7. Exercises
  19. Chapter 11: Peripheral Interfacing – III
    1. 11.1 Serial Communication Principles
    2. 11.2 Simplex, Half Duplex and Full Duplex Communication
      1. 11.2.1 | Synchronous vs Asynchronous Communications
      2. 11.2.2 Asynchronous Communications
      3. 11.2.3 Transmission Rate
      4. 11.2.4 Modems
      5. 11.2.5 Baud Rate vs Bps
      6. 11.2.6 RS-232 Standards
      7. 11.2.7 RS-232 Level Converters
      8. 11.2.8 RS-232 Connectors
      9. 11.2.9 DCE and DTE Devices
      10. 11.2.10 Handshaking in the RS232C Protocol
    3. 11.3 The Programmable Serial Communication Interface
      1. 11.3.1 Universal Asynchronous/Synchronous Receiver/Transmitter – USART 8251
      2. 11.3.2 Functional Block Diagram
        1. 11.3.2.1 Data Bus Buffer
        2. 11.3.2.2 Transmitter Buffer
        3. 11.3.2.3 Transmitter Control
        4. 11.3.2.4 Receive Buffer
        5. 11.3.2.5 Receiver Control
        6. 11.3.2.6 R/W Control Block
        7. 11.3.2.7 Modem Control Block
      3. 11.3.3 How This Chip Operates
      4. 11.3.4 Programming the 8251
      5. 11.3.5 Asynchronous Mode
        1. 11.3.5.1 Mode Instruction Format
        2. 11.3.5.2 Command Instruction Format
      6. 11.3. 6 Programming the 8251
    4. 11.4 Internal Reset on Power Up
    5. 11.5 Direct Memory Access
      1. 11.5.1 DMA Controller
      2. 11.5.2 Flyby DMA
      3. 11.5.3 Fetch and Deposit DMA
      4. 11.5.4 DMA Transfer Modes
      5. 11.5.5 DMA Controller Features
    6. 11.6 The DMA Controller – 8237
      1. 11.6.1 Programming the 8237 DMA Controller
      2. 11.6.2 Functional Block Diagram
      3. 11.6.3 Memory Addresses above 64 KB
      4. 11.6.4 Initialization and Programming the 8237
    7. 11.7 DMA and IBM-PC
      1. 11.7.1 DMA and PC-AT
    8. 11.8 PCI Based Computers
    9. Key Points of this Chapter
    10. Questions
    11. Exercises
  20. Chapter 12: The 8051 Microcontroller
    1. 12.1 Microprocessor vs Microcontroller
      1. 12.1.1 Microprocessors
      2. 12.1.2 Microcontroller
      3. 12.1.3 Embedded Systems
      4. 12.1.4 Application Domain of Embedded Systems
    2. 12.2 History and Family Details of 8051
      1. 12.2.1 Other Members of the Family
      2. 12.2.2 Learning the Features of 8051
    3. 12.3 8051 – The Programmer’s Perspective
      1. 12.3.1 Eight Bit Registers of 8051
        1. 12.3.1.1 The Accumulator Register ‘A’
        2. 12.3.1.2 Register B
        3. 12.3.1.3 Register Banks
        4. 12.3.1.4 Processor Status Word (PSW)
        5. 12.3.1.5 Stack Pointer (SP)
      2. 12.3.2 Internal Memory
        1. 12.3.2.1 Internal RAM
        2. 12.3.2.2 Internal ROM
      3. 12.3.3 Sixteen Bit Registers
        1. 12.3.3.1 Program Counter (PC)
        2. 12.3.3.2 Data Pointer (DPTR)
      4. 12.3.4 Ports
    4. 12.4 Assembly Language Programming
      1. 12.4.1 Modes of Addressing
        1. 12.4.1.1 Register Addressing
        2. 12.4.1.2 Immediate Addressing
        3. 12.4.1.3 Direct Addressing
        4. 12.4.1.4 Register Indirect Addressing
        5. 12.4.1.5 Indexed Addressing
    5. 12.5 Internal RAM
    6. 12.6 The 8051 Stack
      1. 12.6.1 The Push Operation
      2. 12.6.2 The Pop Operation
    7. 12.7 Processor Status Word (PSW)
    8. 12.8 Assembler Directives
      1. 12.8.1 ORG
      2. 12.8.2 EQU
      3. 12.8.3 DB
      4. 12.8.4 BIT
      5. 12.8.5 END
    9. 12.9 Storing Data in Code Memory (ROM)
    10. 12.10 The Instruction Set of 8051
      1. 12.10.1 Data Transfer Instructions
      2. 12.10.2 Bit Manipulation Instructions
      3. 12.10.3 Branch Instructions (1/4)
      4. 12.10.3 Branch Instructions (2/4)
      5. 12.10.3 Branch Instructions (3/4)
      6. 12.10.3 Branch Instructions (4/4)
        1. 12.10.3.1 Unconditional Jump Instructions
        2. 12.10.3.2 Conditional Branch Instructions
        3. 12.10.3.3 Arithmetic Instructions
        4. 12.10.3.4 Subtraction Instructions
        5. 12.10.3.5 Multiplication Instruction
        6. 12.10.3.6 Division Instruction
        7. 12.10.3.7 Decimal Adjust for BCD Addition
        8. 12.10.3.8 Clear the Accumulator
        9. 12.10.3.9 Compare Instruction
        10. 12.10.3.10 Port Programming
        11. 12.10.3.11 Port Instructions
        12. 12.10.3.12 Logical Instructions
        13. 12.10.3.13 Complement
        14. 12.10.3.14 Rotate Instructions
    11. 12.11 Subroutines (Procedures)
    12. 12.12 Delay Loops
      1. 12.12.1 Calculating Delay
      2. 12.12.2 Using NOP
    13. Key Points of this Chapter
    14. Questions
    15. Exercises
  21. Chapter 13: The 8051 Real Time Control
    1. 13.1 Pin Configuration of the 8051
      1. 13.1.1 The Crystal
      2. 13.1.2 Power on Reset
      3. 13.1.3 Port Pins
        1. 13.1.3.1 Output Stage of Port 0
      4. 13.1.4 Pins for External Memory Interfacing
    2. 13.2 Programming the Internal Peripherals
    3. 13.3 Timers of the 8051
      1. 13.3.1 Interval Timer
      2. 13.3.2 Timer Programming
      3. 13.3.3 The Timer Mode Register (TMOD)
      4. 13.3.4 Clock Source for the Timer
      5. 13.3.5 Steps in Programming an Interval Timer
      6. 13.3.6 Writing the Mode Control Word
      7. 13.3.7 Mode 1 Programming
        1. 13.3.7.1 Starting the Timer
        2. 13.3.7.2 Detecting Timer Overflow
        3. 13.3.7.3 Delay Calculation
      8. 13.3.8 Mode 2 Programming
    4. 13.4 Counter Programming
      1. 13.4.1 Measuring an Unknown Frequency
      2. 13.4.2 Event Counting
    5. 13.5 Interrupts of 8051
      1. 13.5.1 Enabling Interrupts
      2. 13.5.2 Using Timers in the Interrupt Mode
      3. 13.5.3 Steps in Using Timer 0 in the Interrupt-Driven Mode
      4. 13.5.4 External Hardware Interrupts
      5. 13.5.5 Edge Triggering of the External Interrupts
    6. 13.6 Serial Communication
      1. 13.6.1 Serial Transmission
      2. 13.6.2 Serial Reception
      3. 13.6.3 RS 232C
      4. 13.6.4 Baud Rates
      5. 13.6.5 Registers in the Uart of 8051
      6. 13.6.6 Modes
      7. 13.6.7 The Transmit Interrupt (TI) Flag
      8. 13.6.8 Steps in Transmitting Data Serially
      9. 13.6.9 Serial Reception
        1. 13.6.9.1 Steps in Receiving Data Serially
    7. 13.7 Conclusion
    8. Key Points of this Chapter
    9. Questions
    10. Exercises
  22. Chapter 14: 80186 – The Embedded Microprocessor
    1. 14.1 History and Development of AVR
      1. 14.1.1 Risc Concepts Used in AVR
    2. 14.2 AVR Microcontroller Types
      1. 14.2.1 Understanding the AVR Architecture
      2. 14.2.2 The AVR Core
        1. 14.2.2.1 On Chip Memory
        2. 14.2.2.2 Program Counter
        3. 14.2.2.3 Register File
        4. 14.2.2.4 Data Address Pointers
        5. 14.2.2.5 Status Register
        6. 14.2.2.6 The AVR Stack
    3. 14.3 The AVR ATMega16
      1. 14.3.1 Pin Diagram
      2. 14.3.2 General Purpose I/O
        1. 14.3.2.1 DDRx (Data Direction Register)
        2. 14.3.2.2 PINx (Port in Register)
        3. 14.3.2.3 PORTx (Port Register)
      3. 14.3.3 Memory Map of the Chip
      4. 14.3.4 Byte-addressable EEPROM
      5. 14.3. 5 Data Memory
      6. 14.3.6 Timer Unit
        1. 14.3.6.1 Clock Sources for the Timer Unit
      7. 14.3.7 Interrupts
      8. 14.3.8 Serial Communication
    4. 14.4 Conclusion
    5. Key Points of this Chapter
    6. Questions
    7. Exercises
  23. Appendix A (1/3)
  24. Appendix A (2/3)
  25. Appendix A (3/3)
  26. Appendix B (1/2)
  27. Appendix B (2/2)
  28. Appendix C (1/2)
  29. Appendix C (2/2)
  30. Appendix D (1/2)
  31. Appendix D (2/2)
  32. Appendix E (1/2)
  33. Appendix E (2/2)
  34. Appendix F
  35. Bibliography
  36. Model Question Papers (1/2)
  37. Model Question Papers (2/2)
  38. Index

Product information

  • Title: Microprocessors and Microcontrollers by Pearson
  • Author(s): Lyla B Das
  • Release date: May 2024
  • Publisher(s): Pearson India
  • ISBN: 9781299445468