Mobile 3D Graphics SoC: From Algorithm to Chip

Index

3D graphics 22, 67–69, 76, 78, 81, 85, 99–104, 110, 112, 114–117, 119, 123–125, 127, 136–145, 153, 295–298

history, 2

address alignment logic (AAL), 105, 106, 121, 150, 151, 234, 242, 267

analog design, 16

API, 6, 8, 12, 18–20, 22, 89, 91, 93–96, 99, 139, 140

application stage, 67, 68

bandwidth, 6, 23, 25, 32, 35, 36, 38, 43, 45, 49–52, 58, 59, 61, 76, 85–87, 89, 91, 92, 94, 95, 104, 107–110, 119, 124, 142–144, 149, 156, 159

bus, 5–7, 23–25, 28–33, 36, 37, 50, 51, 62, 104, 110, 120, 124, 125, 140, 141, 146, 149, 156, 206

cache, 89, 91, 106, 110, 111, 116, 117, 123, 125, 128, 133, 136–141, 144–147, 150, 151, 157, 234, 236, 248, 249, 260, 267, 268

texture cache, 89, 105, 116, 117, 136, 138, 141, 144, 145, 150, 157, 248, 260, 267

vertex cache, 110, 111, 128, 140

clock gating, 27, 52, 89, 99, 101, 102, 120, 140, 150

compression, 95, 99, 106–109, 145

computer graphics 1, 143

coprocessor, 23–25, 124, 125, 145, 146

datapath, 18, 19, 62, 94, 96, 99, 102–104, 112, 114, 116, 121, 126, 133–136, 150, 173, 176, 183, 192, 194, 203, 207, 218, 223, 228, 231, 232, 250, 251, 261, 268–270, 277–279, 286–288

depth comparison, 99, 150

design flow, 9, 20, 21

communication architecture, 6–7, 22

command transfer, 22–24

data transfer, 23, 25, 56, 59, 110, 149, 151

on-chip interconnection, 23, 25, 28

digital design, 16–18

Direct3D, 91, 95, 96, 99, 296

early depth test, 101, 142

embedded DRAM, 87, 89, 90, 119, 120, 121, 122, 143

embedded memory, 104, 122, 140, 204

fixed-point number, 96, 103, 125, ...