Modern VLSI Design: System-on-Chip Design, Third Edition

7Floorplanning

Highlights: Floorplaning styles and methodology. Global routing. Clock distribution. Power distribution. Packaging and pads.

7.1 Introduction

In the last chapter we built architectures from fairly abstract components. This chapter looks at the chip in more detail. We will assume that the block diagram is fixed; now we will study chip-level layout and circuit design. The size of the design problem requires us to develop different methods than we used to design the layout for a single NAND gate. But the basic objectives—area, delay, power—are still the same.

7.2 Floorplanning Methods

Floorplanning is chip-level layout design. When designing a leaf cell, we used transistors and vias as our basic components; floorplanning uses ...