Index

Note: Page numbers followed by f indicate figures, t indicate tables and np indicate footnote.

A

Accelerated Processing Unit (APU) chips 2f, 10–11
Acknowledgment ring (AK) 13
Active target 308, 309
Address ring (AD) 13
Advanced Encryption Standard (AES) 352–353, 496–497
elementary operations 499f
encryption round 497–498
operations 497–501
reference implementation 498–501
Agglomeration, PCAM 28
All-to-all gathering operation 279–283
alternative implementation 282–283
All-to-all reduction operation 288–289
All-to-all scattering operation 283–288
AMD 
APUs 10–11, 11f
Kaveri architecture 11, 11f
Amdahl’s law 21–24
Antidependence 182, 190
Antituple 577
Application file 
executing MPI program 246–248
using  ...

Get Multicore and GPU Programming now with the O’Reilly learning platform.

O’Reilly members experience books, live events, courses curated by job role, and more from O’Reilly and nearly 200 top publishers.