Multiprocessor Systems-on-Chips

2.4. Energy-Aware On-Chip Communication System Design

Computation and storage energy directly benefit from device scaling (smaller gates, smaller memory cells), but unfortunately the energy for global communication does not scale down. Projections assuming aggressive physical and circuit level optimizations for global wires [42] show that global communication on chip will require increasingly higher energy, the majority of it being active energy. Hence, communication-related energy is a significant concern in future MPSoC systems that will create many new challenges that have not been addressed in traditional high-performance on-chip interconnect design.

In this section we will explore various communication energy minimization approaches, moving ...