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Multiprocessor Systems-on-Chips by Wayne Wolf, Ahmed Jerraya

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3.4. Software Layers

The hardware infrastructure described in the previous sections provides a basic communication service to the network’s end nodes. Most of the end nodes in future on-chip networks will be programmable, ranging from general-purpose microprocessors, to application-specific processors, to reconfigurable logic. Other nodes, such as I/O blocks and memories, will serve as slaves for the processor nodes, but they will also support some degree of reconfigurability. At the application level, programmers need a programming model and software services to exploit effectively the computational power and the flexibility of these highly parallel heterogeneous architectures. This section focuses on the system software and programming environment ...

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