5.2. The Limitations of Traditional ASIC Design
As discussed, logic design and verification consume much of the SoC design effort. New chips are characterized by rapidly increasing logic complexity. Moore’s-law scaling of silicon density makes multi-million-gate designs feasible. Fierce product competition in system features and capabilities makes these advanced silicon designs necessary. The well-recognized design gap widens every year [207].
Moreover, the market trend toward high-performance, low-power systems (long-battery-life cell-phones; 5-Mpixel digital cameras; fast, inexpensive color printers; high-definition digital televisions; and 3D video games) is also increasing the number of SoC designs. Unless something closes the design gap, ...
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