Impact of Random Interface Traps on Asymmetric Characteristic Fluctuation of 16-nm-Gate MOSFET Devices

Yiming Li


3.1    Introduction

3.2    The Statistical 3D Device Simulation

3.3    Results and Discussion

3.4    Conclusions




Silicon device technology scaling and performance improvement require [1, 2 and 3] not only overcoming a variety of fabrication challenges but also suppressing systematic variation and random effects [4, 5, 6 and 7]. Except process variation effect (PVE), random dopant fluctuation (RDF), as one of the known major intrinsic parameter fluctuations, complicates device manufacturing and degrades device characteristics in the nanometer scale complementary metal–oxide ...

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