Optimized Built-In Self-Test Technique for CAEN-Based Nanofabric Systems |
CONTENTS
45.1.1 Benefits and Challenges of Nanotechnology
45.2 Background and Related Works
45.2.1 Novel Logic Mapping Technique
45.3.2 Test Architectures and Procedure
45.3.4 Algorithm for Locating Defects and Example Defect Detection
45.3.5 Example of a Faulty Block Identification
45.3.6 Design of New BUT Configurations and Test Patterns and Fault Coverage Analysis
45.3.7 Configuration C1: Stuck-at-0 and Stuck-Open Faults
45.3.8 Configuration C2: Stuck-at-1 Faults
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