Nanoelectronic Device Applications Handbook

64	On Physical Limits and Challenges of Graphene Nanoribbons as Interconnects for All-Spin Logic Shaloo Rakheja and Azad Naeemi

CONTENTS

64.1  Introduction

64.2  CMOS Circuit

64.3  ASL Circuit

64.3.1  Nanomagnet Dynamics

64.3.2  Interconnect Dynamics

64.3.2.1  Diffusion Coefficient in GNRs

64.3.2.2  Spin-Relaxation Length in Graphene

64.3.2.3  Spin Injection and Transport Efficiency

64.4  Comparison of Electrical and Spintronic Circuits

64.5  Conclusions and Outlook

References

64.1  INTRODUCTION

The semiconducting material silicon is at the heart of the current complementary metal–oxide–semiconductor (CMOS) technology, which today has developed into a $270-billion market [1]. Over the last four decades as the minimum feature size (MFS) on ...