10

TIME-DIVISION-MULTIPLEXED SWITCHING

10.1 Introduction

10.2 TDM Review

10.3 TDM Switching Problem

10.3.1 Temporal Alignment

10.3.2 Dual Control Pages

10.3.3 Strictly Nonblocking Design

10.3.4 Varying Port Configurations

10.4 Central Memory TDM Switches

10.4.1 Cost Model for Central Memory TDM Switches

10.4.2 Limits of Central Memory Design

10.5 Ingress-Buffered TDM Switches

10.6 Egress-Buffered Self-Select TDM Switches

10.7 Sliced Single-Stage SNB TDM Fabrics

10.8 Time–Space Multistage TDM Fabrics

10.8.1 Architecture and Costs of Time–Space–Time Switch Fabrics

10.8.2 Blocking and OPA

10.8.3 Space–Time–Space Switching

10.9 Multistage Memory Switches

10.10 Summary

Key Points

References

10.1 INTRODUCTION

This chapter is the second in a sequence of three chapters on the switching technologies used in various layers of transport networks. Chapter 9 provided an overview of switching issues and considered the switching of complete physical signals. This chapter covers the switching of logical circuits or time-division-multiplexed (TDM) signals. Chapter 11 covers the switching of packets and cells.

Although the Internet seems to be moving toward packetized traffic of the TCP/IP protocol suite, it would be a mistake to assume that only packet (or cell) switching techniques are required and that TDM is a sunset technology that could slowly be retired as it is replaced. Instead, there are compelling reasons to continue to use and to understand TDM protocols and systems. The irreplaceable ...

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