9.1 Introduction
The network-on-chip architectures, discussed so far in the book, are developed around regular topologies, with the inherent assumption that the cores are all of equal size. The main advantage of such a regular NoC architecture is topology reuse and reduced design time. The assumptions of equal core size and communication bandwidth requirement hold for homogeneous cores. However, application-specific system-on-chip (SoC) architectures, in general, contain heterogeneous cores and memory elements with widely varying sizes. Hence, even though the system-level NoC architecture is regular, after floorplanning the final topology becomes irregular. Maintaining a regular structure ...
