Virtual bus structure-based network-on-chip topologies†
The need for scalable and efficient on-chip communication in future many-core architecture has resulted in the networks-on-chip (NoCs) design emerging as a popular solution. It is a common belief that packet-based NoCs can provide high efficiency, high throughput, and low latency for future applications instead of the conventional transaction-based bus. However, these superior features of NoCs apply only to unicast (one-to-one) latency noncritical traffic. Their multihop feature and inefficient multicast (one-to-many) or broadcast (one-to-all) support have made their use awkward when performing some kinds of communications, including cache coherence protocol and global ...
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