Notes on Digital Signal Processing: Practical Recipes for Design, Analysis and Implementation

Note 53. Multistage Decimators

When large reductions in sampling rates are required, the design of adequate decimation filters becomes more difficult, usually resulting in filters with a prohibitively large number of taps. This note introduces multistage decimators that accomplish large reductions in sampling rate as a sequence of several smaller reductions. In a properly designed multistage approach, the filters for all the stages have a total tap count that is significantly lower than the filter tap count needed to obtain similar performance from a single-stage implementation.

When the desired decimation factor, M, can be expressed as a product of I positive integer factors

M = M₁ M₂ ... M_I

the desired decimation can be realized as a cascade ...